Fairchild FDC6303N datasheet
Summary
Revolutionize your circuit design with the FDC6303N Dual N-Channel DMOS FET. Optimized for low-voltage applications (down to 3V), this high-density field-effect transistor serves as a single replacement component for multiple discrete transistors, ensuring robust load switching and minimal power loss. This comprehensive technical manual provides all necessary electrical characteristics, thermal analysis, and operating guidelines needed for engineers designing efficient, reliable digital circuits.
Page 1 Text Content
August 1997
FDC6303N Digital FET, Dual N-Channel
General Description Features
25 V, 0.68 A continuous, 2 A Peak.
These dual N-Channel logic level enhancement mode field
effect transistors are produced using Fairchild's proprietary, RDS(ON) = 0.6 Ω @ VGS = 2.7 V
high cell density, DMOS technology. This very high density RDS(ON) = 0.45 Ω @ VGS= 4.5 V. process is especially tailored to minimize on-state
Very low level gate drive requirements allowing direct
resistance. This device has been designed especially for
operation in 3V circuits. VGS(th) < 1.5 V.
low voltage applications as a replacement for digital transistors in load switching applications. Since bias
Gate-Source Zener for ESD ruggedness.
resistors are not required this one N-Channel FET can
>6k V Human Body Model
replace several digital transistors with different bias resistors like the IMHx A series. Replace multiple NPN digital transistors (IMHx A series)
with one DMOS FET.
SOT-23 Super SOTTM-8 SOT-223Super SOTTM-6 SOIC-16SO-8
Mark: .303
Absolute Maximum Ratings TA = 25°C unless otherwise noted Symbol Parameter FDC6303N Units VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous 0.68
- Pulsed
PD Maximum Power Dissipation (Note 1a) 0.9
(Note 1b) 0.7
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
ESD Electrostatic Discharge Rating MIL-STD-883D 6.0 k V
Human Body Model (100pf / 1500 Ohm)
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) °C/W
© 1997 Fairchild Semiconductor Corporation FDC6303N Rev.C
Page Summary Contents For Fairchild FDC6303N datasheet
Manual Details
| Brand | Fairchild |
|---|---|
| Pages | 5 |
| File Size | 78.33 KB |
| Published | May 20, 2026 |
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Frequently Asked Questions
What voltage levels is the FDC6303N designed for optimal low voltage applications?
It is specifically designed for operation in 3V circuits, making it suitable for V < 1.5V gateway applications.
How resilient is this transistor against static electricity damage?
The device has an ESD rating of 6.0 kV using the Human Body Model (HPO), and internal structures are built to provide ESD ruggedness.
What are the continuous current and voltage limits for this FET?
It supports a continuous drain current up to 0.68 A, and its maximum drain-source voltage (VDS) is 25 V.
How does the thermal resistance vary depending on the circuit board mounting surface?
For single device operation on FR-4 in still air, the junction-to-ambient thermal resistance (RJA) is rated at 140 °C/W.