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Fairchild FDA20N50F datasheet

Summary

This advanced N-Channel MOSFET is a high-efficiency power semiconductor engineered for demanding applications requiring superior switching capabilities and maximum current handling. This comprehensive technical manual provides detailed data on electrical characteristics, thermal management, turn-on/turn-off times, and avalanche ratings. It is essential documentation for power electronics designers developing active PFC units, switched mode power supplies (SMPS), and industrial circuits that require reliable and robust performance under dynamic operating conditions.

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FD 20N 50F N -C hannel M SFET

January 2012

Uni FET TM

FDA20N50F

N-Channel MOSFET 500V, 22A, 0.26Ω Features Description RDS(on) = 0.22Ω ( Typ.) @ VGS = 10V, ID = 11A These N-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary, planar

Low gate charge ( Typ. 50n C )

stripe, DMOS technology.

Low Crss ( Typ. 27p F )

This advance technology has been especially tailored to minimize on-state resistance, provide superior switching

Fast switching

performance, and withstand high energy pulse in the avalanche

100% avalanche tested and commutation mode. These device are well suited for high

efficient switched mode power supplies and active power factor

Improved dv/dt capability

correction.

Ro HS compliant

TO-3PN

MOSFET Maximum Ratings TC = 25o C unless otherwise noted* Symbol Parameter Ratings Units

VDSS Drain to Source Voltage VGSS Gate to Source Voltage ±30

-Continuous (TC = 25o C)

ID Drain Current

-Continuous (TC = 100o C)

IDM Drain Current - Pulsed (Note 1) EAS Single Pulsed Avalanche Energy (Note 2) m J IAR Avalanche Current (Note 1) EAR Repetitive Avalanche Energy (Note 1) m J

dv/dt Peak Diode Recovery dv/dt (Note 3) V/ns

(TC = 25o C)

PD Power Dissipation

- Derate above 25o C 3.1 W/o C

TJ, TSTG Operating and Storage Temperature Range -55 to +150 Maximum Lead Temperature for Soldering Purpose, o C

1/8” from Case for 5 Seconds

Thermal Characteristics Symbol Parameter Min. Max. Units RθJC Thermal Resistance, Junction to Case - 0.44

o C/WRθCS

Thermal Resistance, Case to Sink 0.24 RθJA Thermal Resistance, Junction to Ambient -

©2012 Fairchild Semiconductor Corporation www.fairchildsemi.com1 FDA20N50F Rev.C0

Page Summary Contents For Fairchild FDA20N50F datasheet

Page 1 FD 20N 50F N -C hannel M SFET January 2012 Uni FET TM FDA20N50F N-Channel MOSFET 500V, 22A, 0.26Ω Features Description RDS(on) = 0.22Ω ( Typ.) @ VGS = 10V, ID = 11A These N-Channel enhancement mode po...
Page 2 FD 20N 50F N -C hannel M SFET Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDA20N50F FDA20N50F TO-3PN Electrical Characteristics TC = 25o C unle...
Page 3 FD 20N 50F N -C hannel M SFET Typical Performance Characteristics ap ac ita nc es [p F] ra in -S ou rc n- es is ta nc ,D ra in ur re nt [A Figure 1. On-Region Characteristics Figure 2. Transfer Charac...
Page 4 FD 20N 50F N -C hannel M SFET Typical Performance Characteristics (Continued) , [ or al iz ed , D ra in ur re nt [A ra in -S ou rc re ak do Vo lta ge Figure 7. Breakdown Voltage Variation Figure 8. Ma...
Page 5 FD 20N 50F N -C hannel M SFET Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms www.fairchildsemi.com5...
Page 6 FD 20N 50F N -C hannel M SFET Peak Diode Recovery dv/dt Test Circuit & Waveforms Driver RG Same Type as DUT VDD dv/dt controlled by RG ISD controlled by pulse period Gate Pulse Width VGS D = Gate ...
Page 7 FD 20N 50F N -C hannel M SFET Mechanical Dimensions TO-3PN www.fairchildsemi.com7 FDA20N50F Rev.C0
Page 8 FD 20N 50F N -C hannel M SFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not in...

Manual Details

Brand Fairchild
Pages 8
File Size 372.79 KB
Published June 16, 2026
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Frequently Asked Questions

What is the maximum drain-to-source voltage for the FDA20N50F MOSFET?

The maximum drain-to-source voltage (V_DSS) is 500V.

What is the typical gate charge for switching applications?

The typical total gate charge (Q_g(tot)) at 10V is 50nC.

How does power dissipation derate with increasing temperature?

Power dissipation derates above 25°C at 3.1W/°C.

What is the peak diode recovery dv/dt capability?

The peak diode recovery dv/dt is rated at 20V/ns under specified conditions.