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Motorola Semiconductor MC10E141 MC100E141 Data Sheet User Manual

Summary

An industrial-grade 8-bit full-function, bi-directional shift register designed for high-speed data transfer up to 700MHz. This component supports simultaneous parallel and serial data inputs/outputs across Load, Hold, Shift Left, and Shift Right modes. This technical guide provides system designers and electronics engineers with comprehensive documentation, including detailed function tables, electrical characteristics, pinouts, and timing diagrams necessary for precise integration into digital control and processing systems.

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查询MC100E141供应商 SEMICONDUCTOR TECHNICAL DATA

The MC10E/100E141 is an 8-bit full-function shift register. The E141 performs serial/parallel in and serial/parallel out, shifting in either direction. The eight inputs D0 D7 accept parallel input data, while DL/DR accept serial input data for left/right shifting. The Qn outputs do not need to be terminated for the shift operation to function. To minimize noise and power, any Q output not used should be left unterminated. 700MHz Min. Shift Frequency

8-BIT SHIFT

8-Bit

REGISTER

Full-Function, Bi-Directional Asynchronous Master Reset Pin-Compatible with E241 Extended 100E VEE Range of – 4.2V to – 5.46V 75kΩ Input Pulldown Resistors

The select pins, SEL0 and SEL1, select one of four modes of operation: Load, Hold, Shift Left, Shift Right, according to the Function Table. Input data is accepted a set-up time before the positive clock edge. A HIGH on the Master Reset (MR) pin asynchronously resets all the

FN SUFFIX

registers to zero.

PLASTIC PACKAGE CASE 776-02

Pinout: 28-Lead PLCC (Top View)

Q7VCCOD5D6D7DLSEL0

SEL1 Q6

FUNCTION TABLE

CLK Q5

SEL0 SEL1 Function

MR VCC

Load Shift Right (Dn to Dn+1)

VEE NC

Shift Left (Dn to Dn –1) Hold

DR VCCO

PIN NAMES

Pin Function

D0 D7 Parallel Data Inputs DL, DR Serial Data Inputs SEL0, SEL1 Mode Select In Inputs CLK Clock

D3 D4 VCCOD2 Q0 Q1 Q2

Q0 Q7 Data Outputs

* All VCC and VCCO pins are tied together on the die. MR Master Reset

EXPANDED FUNCTION TABLE Function DL DR SEL0 SEL1 MR CLK Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Load D0 D1 D2 D3 D4 D5 D6 D7 Shift Right Q0 Q1 Q2 Q3 Q4 Q5 Q6

Shift Left Q0 Q1 Q2 Q3 Q4 Q5

Hold Q0 Q1 Q2 Q3 Q4 Q5

Reset

2–1 REV 3 Motorola, Inc. 1996

Page Summary Contents For Motorola Semiconductor MC10E141 MC100E141 Data Sheet User Manual

Page 1 查询MC100E141供应商 SEMICONDUCTOR TECHNICAL DATA The MC10E/100E141 is an 8-bit full-function shift register. The E141 performs serial/parallel in and serial/parallel out, shifting in either direction. The ...
Page 2 MC10E141 MC100E141 LOGIC DIAGRAM BITS 1 SEL1 SEL0 CLK MR DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND) Symbol Characteristic min typ max min typ max min typ max Unit Condition IIH ...
Page 3 MC10E141 MC100E141 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 776–02 ISSUE D 0.007 (0.180) –M SM Y BRK -N- 0.007 (0.180) –M SM G1X 0.010 (0.250) –M SS VIEW D-D 0.007 (0.180) –M SM 0.007 (0...
Page 4 MC10E141 MC100E141 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its p...

Manual Details

Brand Motorola
Pages 4
File Size 112.68 KB
Published June 04, 2026
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Frequently Asked Questions

What is the maximum shift frequency of the device?

The maximum shift frequency ranges between 700 MHz and 900 MHz when operating in shift mode.

How must I reset the internal registers?

You must apply a HIGH signal to the Master Reset (MR) pin. This asynchronously resets all flip-flop suffixes to zero.

What caution is given regarding this product's intended use?

The device is not designed or authorized for use in life support systems, surgical implants, or any application where failure could cause personal injury or death.

How do I determine the device's operational function (e.g., Load vs. Shift Right)?

The four modes of operation are selected by using the SEL0 and SEL1 pins according to the provided Function Table.