Motorola MC10SX1226 Data Sheet
Summary
The MC10SX1126 is a specialized, high-gain limiting amplifier designed for critical 1.25Gb/s fiber optic applications, including SONET and ATM links. This technical guide provides comprehensive documentation on integrating this device into trans-impedance amplifiers. It details advanced functions such as auto-zero offset cancellation and programmable signal level detection capabilities. Ideal for telecommunications engineers and hardware designers who build high-speed optical communication systems requiring maximum bandwidth and stability.
Page 1 Text Content
SEMICONDUCTOR TECHNICAL DATA
The MC10SX1126 is an integrated limiting amplifier for high frequency fiber optic applications. The device interfaces directly to the trans–impedance amplifier of a typical optical to electrical conversion portion of a fiber optic link. With data rate capabilities in the 1.25Gb/s
FIBER OPTIC
range, the high gain limiting amplification of the SX1126 is ideal for high
speed fiber optic applications like SONET/SDM, ATM, FDDI, Fibre POST AMPLIFIER
Channel or Serial Hippi. The device is functionally and pin compatible to the Signetics SA5225 with a significantly higher bandwidth. The CAZP and CAZN inputs to the limiting amplifier provide an auto-zero function to effectively cancel any input offset voltage present in the amplifier. The SX1126 incorporates a programmable level detect function to identify when the input signal has been lost. This information can be fed back to the Disable input of the device to maintain stability under loss of signal conditions. Using the Vset pin the sensitivity of the level detect can be adjusted. The CLD input is used to filter the level detect input so that random noise spikes are filtered out. The MC10SX1126 is compatible with MECL10H logic levels.
D SUFFIX PLASTIC SOIC PACKAGE
Wideband Operation: 50MHz to 900MHz CASE 751B-05 Programmable Input Signal Level Detection Operation with single +5V or standard ECL supply Standard 16-lead SOIC Package Fully Differential Design to Minimize Noise Affects 10KH Compatible
CAZP CAZN
Limiting ECL
Vset Vref VCCE Dout Dout GNDE LOS LOS
Amplifier Buffer
Disable Disable
Vref Reference
CAZN CAZP GNDA Din Din VCCA CLD Disable
Level ECL
Detect Buffer Figure 2. 16–Lead Pinout
Vset LOS (Top View)
Figure 1. MC10SX1126 Block Diagram
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
REV 0.1 Motorola, Inc. 1998
Page Summary Contents For Motorola MC10SX1226 Data Sheet
Manual Details
| Brand | Motorola |
|---|---|
| Pages | 5 |
| File Size | 83.20 KB |
| Published | June 06, 2026 |
Enter the captcha to get the download link:
Frequently Asked Questions
What data rates is the MC10SX1126 suitable for?
It supports data rate capabilities in the 1.25Gb/s FIBER OPTIC range, ideal for SONET/SDM, ATM, or FDDI applications.
How does the device monitor signal loss?
The Loss of Signal (LOS) output goes HIGH when the input signal drops below a specific threshold set by the V pin and monitored via the LD pin.
What is the function of the auto-zero feature?
Connecting capacitors between AZP/AZN and C performs an auto-zero function, which effectively cancels any inherent input offset voltage in the amplifier.
Are there restrictions on where this product can be used?
No; it must not be used as a component in systems intended for surgical implants or life support applications.