Motorola MC74LVQ373 Data Sheet

查询MC74LVQ373供应商 SEMICONDUCTOR TECHNICAL DATA

$! "! !  ! ! !! #! The MC74LVQ373 is a high performance, non–inverting octal transparent latch operating from a 2.7 to 3.6V supply. The MC74LVQ373 LVQ is suitable for TTL level bus oriented applications where a memory element is required. The MC74LVQ373 contains 8 D–type latches with 3–state outputs.

LOW–VOLTAGE

When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters

CMOS OCTAL

the latches. In this condition, the latches are transparent, i.e., a latch

output will change state each time its D input changes. When LE is LOW, TRANSPARENT LATCH

the latches store the information that was present on the D inputs a setup time preceding the HIGH–to–LOW transition of LE. The 3–state standard outputs are controlled by the Output Enable (OE) input. When OE is LOW, the standard outputs are enabled. When OE is HIGH, the standard outputs are in the high impedance state, but this does not interfere with new data entering into the latches. Current drive capability is 12m A at the DW SUFFIX outputs. PLASTIC SOIC

CASE 751D–04

Designed for 2.7 to 3.6V VCC Operation – Ideal for Low Power/Low Noise Applications Guaranteed Simultaneous Switching Noise Level and Dynamic

M SUFFIX

Threshold Performance

PLASTIC SOIC EIAJ

Guaranteed Skew Specifications CASE 967–01 Guaranteed Incident Wave Switching into 75Ω Low Static Supply Current (10µA) Substantially Reduces System Power Requirements

SD SUFFIX

Latchup Performance Exceeds 500m A

PLASTIC SSOP

ESD Performance: Human Body Model >2000V

CASE 940C–03

DT SUFFIX PLASTIC TSSOP

Pinout: 20–Lead (Top View)

CASE 948E–02

VCC O7 D7 D6 O6 O5 D5 D4 O4 LE

PIN NAMES

Pins Function OE Output Enable Input

LE Latch Enable Input D0–D7 Data Inputs O0–O7 3–State Latch Outputs

OE O0 D0 D1 O1 O2 D2 D3 O3 GND

REV 1 Motorola, Inc. 1995