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Intel(Intersil) ISL9012 Data Sheet

Summary

The ISL9012 is a high-performance dual Low Dropout Regulator (LDO) designed for powering critical circuits in demanding portable electronics. It provides two independently controllable, highly stable voltage outputs while maintaining an extremely low quiescent current (45µA). This datasheet details the device’s comprehensive technical specifications, including advanced features like high PSRR, Power-On-Reset (POR), and wide input/output voltage options. Ideal for engineers developing smart phones, PDAs, or medical handheld devices that require both reliable power regulation and ultra-low power consumption in a compact footprint.

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ISL9012

NOT RECOMMENDED FOR NEW DESIGNS

Data Sheet March 11, 2008 FN9220.3

NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc

Dual LDO with Low Noise, Low IQ, and Features High PSRR

Integrates two high performance LDOs

ISL9012 is a high performance dual LDO capable of VO1 - 150m A output sourcing 150m A current from Channel 1, and 300m A from VO2 - 300m A output Channel 2. The device has a low standby current and

Excellent transient response to large current steps

high-PSRR and is stable with output capacitance of 1µF to

10µF with ESR of up to 200mΩ. Excellent load regulation: 1% voltage change across full range of load current

The device integrates a Power-On-Reset (POR) function for

High PSRR: 70d B @ 1k Hz

the VO2 output. The POR delay for VO2 can be externally programmed by connecting a timing capacitor to the CPOR Wide input voltage capability: 2.3V to 6.5V pin. A reference bypass pin is also provided for connecting a

Extremely low quiescent current: 45µA (both LDOs on)

noise-filtering capacitor for low noise and high PSRR applications. Low dropout voltage: typically 120m V @ 150m A

The quiescent current is typically only 45µA with both LDO’s Low output noise: typically 30µVRMS @ 100µA (1.5V)

enabled and active. Separate enable pins control each

Stable with 1 to10µF ceramic capacitors

individual LDO output. When both enable pins are low, the

Separate enable pins for each LDO

device is in shutdown, typically drawing less than 0.1µA.

POR output, with adjustable delay time indicates when the

Several combinations of voltage outputs are standard.

VO2 output is good

Output voltage options for each LDO range from 1.5V to 3.3V. Other output voltage options are available on request. Soft-start to limit input current surge during enable

Current limit and overheat protection

Pinout

www.BDTIC.com/Int ±1.8% accuracy over all operating conditions rsil

ISL9012 (10 LD 3X3 DFN)

Tiny 10 Ld 3x3mm DFN package

TOP VIEW

-40°C to +85°C operating temperature range VIN VO1 Pin compatible with Micrel MIC2212

EN1 VO2 Pb-free (Ro HS compliant)

EN2 POR

Applications

CBYP NC

CPOR GND PDAs, Cell Phones and Smart Phones

Portable Instruments, MP3 Players Handheld Devices including Medical Handhelds

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc.

Copyright © Intersil Americas Inc. 2005, 2006. 2008. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.

Page Summary Contents For Intel(Intersil) ISL9012 Data Sheet

Page 1 ISL9012 NOT RECOMMENDED FOR NEW DESIGNS Data Sheet March 11, 2008 FN9220.3 NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc Dual LDO with Low N...
Page 2 ISL9012 Ordering Information PART NUMBER VO1 VOLTAGE VO2 VOLTAGE TEMP RANGE PACKAGE (Notes 1, 2, 3) PART MARKING (V) (V) (°C) (Pb-free) PKG. DWG. # ISL9012IRNNZ DCTA 3.3 3.3 -40 to +85 10 Ld 3x3 DFN L...
Page 3 ISL9012 Absolute Maximum Ratings Thermal Information Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.1V Thermal Resistance (Notes 4, 5) θJA (°C/W) θJC (°C/W) VO...
Page 4 ISL9012 Electrical Specifications Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature range of the device as follows: TA = -40°C to +85°C; VIN = (...
Page 5 ISL9012 TP VO LT E, TP VO LT E, (V TP VO LT Typical Performance Curves VO = 3.3V 0.08 VIN = 3.8V 0.6 ILOAD = 0m A VO = 3.3V LOAD CURRENT - IO (m A) INPUT VOLTAGE (V) FIGURE 2. OUTPUT VOLTAGE vs INPUT ...
Page 6 ISL9012 EN (µ VO LT (V PO VO LT E, (m V) Typical Performance Curves (Continued) VO1 = 3.3V VO1 = 3.3V VO2 = 2.8V IO (BOTH CHANNELS) = 0µA OUTPUT LOAD (m A) INPUT VOLTAGE (V) FIGURE 8. VO1 DROPOUT VOLT...
Page 7 ISL9012 PS (d VE (V VO (V Typical Performance Curves (Continued) VO2 (10m V/DIV) VO = 3.3V ILOAD = 150m A CLOAD = 1µF VIN = 5.0V CBYP = 0.01µF VO1 = 3.3V VO2 = 2.8V IL1 = 150m A IL2 = 300m A 3.6V CL1,...
Page 8 ISL9012 Pin Description PIN PIN NUMBER NAME TYPE DESCRIPTION VIN Analog I/O Supply Voltage/LDO Input: Connect a 1µF capacitor to GND. EN1 Low Voltage Compatible LDO-1 Enable. CMOS Input EN2 Low Voltag...
Page 9 ISL9012 Block Diagram 1V ERROR TRIM VO1 AMPLIFIER IS VO2 COMPARATOR VOK2 POR LDO-2 LDO-1 EN1 POR CONTROL POR LOGIC DELAY EN2 VOK2 www.BDTIC.com/Intersil BANDGAP AND VOLTAGE UVLO TEMPERATURE REFERENCE ...
Page 10 ISL9012 delays the VO2 turn-on until the VO1 output reaches its one of the following output voltages: 1.5V, 1.8V, 1.85V, 2.5V, target level. 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V, and 3.3V. If EN2 is br...
Page 11 ISL9012 Dual Flat No-Lead Plastic Package (DFN) C0.10 10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE 2X MILLIMETERS SYMBOL NOMINAL MAX NOTESMIN A1 0.05 A3 0.20 REF INDEX 3.00 BSC TOP VIEW 3.00 BSC 0.50 BSC...

Manual Details

Brand Intel
Pages 11
File Size 220.99 KB
Published May 30, 2026
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Frequently Asked Questions

What is the operating temperature range?

The device operates in a -40°C to +85°C temperature range.

How stable are the LDO outputs regarding input voltage swings or load changes?

They offer excellent transient response, excellent load regulation (1% change), and high PSRR of 70dB @ 1kHz.

What is the typical quiescent current draw?

The quiescent current typically remains only 45µA when both LDOs are enabled and active.

Are there separate controls for each power output?

Yes, the device features separate enable pins (EN1 and EN2) to control each individual LDO output.