Intel Silicon Intersil ISL9000AMRNCEP Data Sheet
Summary
This comprehensive datasheet details the ISL9000AMRNCEP, a high-performance dual Low Dropout (LDO) regulator designed for advanced power management in portable electronics. Featuring low noise, very high PSRR, and stable operation across extreme temperature ranges (-55°C to +125°C), this device ensures reliable power delivery to its two outputs while minimizing quiescent current draw. The manual provides detailed specifications, pinouts, and guidance necessary for integrating the chip into complex designs, making it ideal for engineers developing smartphones, PDAs, medical instruments, and other battery-powered handheld devices.
Page 1 Text Content
ISL9000AMRNCEP
December 12, 2007 FN6620.0Data Sheet
Dual LDO with Low Noise, Very High Features PSRR and Low IQ
Integrates Two 100m A High Performance LDO’s
ISL9000AMRNCP is a high performance dual LDO capable
IOUT per Channel is 50m A at TJ = +150°C
of sourcing 100m A current from each output. It has a low
standby current and very high PSRR and is stable with Excellent Transient Response to Large Current Steps
output capacitance of 1µF to 10µF with ESR of up to 200mΩ.
±1.8% Accuracy Over all Operating Conditions
The device integrates an individual Power-On-Reset (POR)
Excellent Load Regulation:
function for each output. The POR delay for VO2 can be < 0.1% Voltage Change Across Full Range of Load externally programmed by connecting a timing capacitor to Current the CPOR pin. The POR delay for VO1 is internally fixed at
Low Output Noise: Typically 30µVrms @ 100µA (1.5V)
approximately 2ms. A reference bypass pin is also provided
for connecting a noise filtering capacitor for low noise and Very High PSRR: 90d B @ 1k Hz
high-PSRR applications.
Extremely Low Quiescent Current: 42µA (both LDOs active)
The quiescent current is typically only 42µA with both LDO’s enabled and active. Separate enable pins control each Wide Input Voltage Capability: 2.3V to 5.5V individual LDO output. When both enable pins are low, the
Low Dropout Voltage: Typically 200m V @ 100m A
device is in shutdown, typically drawing less than 0.1µA.
Stable with 1µF to 10µF Ceramic Capacitors
Output voltage for the LDO are VOUT1 = 3.3V and
VOUT2 1.8V. Separate Enable and POR Pins for Each LDO Soft-Start and Staged Turn-On to Limit Input Current
Device Information
Surge During Enable
The specifications for an Enhanced Product (EP) device are
www.BDTIC.com/Int Current Limit and Overheat Protection rsil
defined in a Vendor Item Drawing (VID), which is controlled
by the Defense Supply Center in Columbus (DSCC). Tiny 10 Ld 3x3mm DFN Package
“Hot-links” to the applicable VID and other supporting
-55°C to +125°C Operating Temperature Range
application information are provided on our website.
Applications
Pinout
PDAs, Cell Phones and Smart Phones
ISL9000AMNCEP (10 LD 3X3 DFN) Portable Instruments, MP3 Players TOP VIEW
Handheld Devices including Medical Handheld
VIN VO1
EN1 VO2
EN2 POR2
CBYP POR1
CPOR GND
Ordering Information VENDOR PART VO1 VO2 NUMBER VENDOR ITEM PART VOLTAGE VOLTAGE TEMP RANGE PKG (Notes 1, 2) DRAWING MARKING (V) (V) (°C) PACKAGE DWG. #
ISL9000AMRNCEP V62/08609-01XB DKTA 3.3 1.8 -55 to +125 10 Ld 3x3 DFN L10.3x3C
NOTES: 1. Add -T to part number for tape and reel. 2. Devices must be procured to the VENDOR PART NUMBER.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2007. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
Page Summary Contents For Intel Silicon Intersil ISL9000AMRNCEP Data Sheet
Manual Details
| Brand | Intel |
|---|---|
| Pages | 2 |
| File Size | 59.42 KB |
| Published | May 30, 2026 |
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Frequently Asked Questions
What type of capacitors are required for stable operation?
The LDOs require a ceramic capacitor ranging from 1µF to 10µF.
How is the power-on sequence controlled?
The device uses separate Power-On-Reset (POR) pins, and the POR delay for VO2 can be externally programmed.
What measures are needed when handling this IC?
Be advised that these devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
What is the device's typical low output noise level?
The typical low output noise voltage is 30µV @ 100µA (1.5V) rms.