Fairchild FDD6N50F FDU6N50F User Manual
Summary
Discover the superior performance of these N-Channel MOSFETs, designed with advanced planar stripe DMOS technology for maximum efficiency. This component features low on-state resistance (Rds(on)) and exceptional switching capabilities. The comprehensive manual provides engineers with detailed technical specifications, covering electrical characteristics, thermal handling limits, and operation guidelines necessary for reliable circuit design. Ideal for building high-efficiency switched mode power supplies (SMPS) and active power factor correction (PFC) applications requiring fast response and robust performance up to 500V.
Page 1 Text Content
FD 6N 50F / FD 6N 50F N -C hannel M SFET
January 2012
Uni FET TM
FDD6N50F / FDU6N50F
N-Channel MOSFET 500V, 5.5A, 1.15Ω Features Description RDS(on) = 0.95Ω ( Typ.)@ VGS = 10V, ID = 2.75A These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
Low gate charge ( Typ. 15n C)
stripe, DMOS technology.
Low Crss ( Typ. 6.3p F)
This advance technology has been especially tailored to minimize on-state resistance, provide superior switching
Fast switching
performance, and withstand high energy pulse in the avalanche
100% avalanche tested and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
Improved dv/dt capability
correction.
Ro HS compliant
I-PAK
D-PAK
FDU Series
FDD Series
MOSFET Maximum Ratings TC = 25o C unless otherwise noted* Symbol Parameter Ratings Units
VDSS Drain to Source Voltage VGSS Gate to Source Voltage ±30
-Continuous (TC = 25o C) 5.5
ID Drain Current
-Continuous (TC = 100o C) 2.4
IDM Drain Current - Pulsed (Note 1) EAS Single Pulsed Avalanche Energy (Note 2) m J IAR Avalanche Current (Note 1) 5.5 EAR Repetitive Avalanche Energy (Note 1) 8.9 m J
dv/dt Peak Diode Recovery dv/dt (Note 3) V/ns
(TC = 25o C)
PD Power Dissipation
- Derate above 25o C 0.71 W/o C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 Maximum Lead Temperature for Soldering Purpose, o C
1/8” from Case for 5 Seconds
Thermal Characteristics Symbol Parameter Ratings Units RθJC Thermal Resistance, Junction to Case 1.4
RθJA Thermal Resistance, Junction to Ambient 83 *When mounted on the minimum pad size recommended (PCB Mount)
©2012 Fairchild Semiconductor Corporation www.fairchildsemi.com1 FDD6N50F / FDU6N50F Rev.C0
Page Summary Contents For Fairchild FDD6N50F FDU6N50F User Manual
Manual Details
| Brand | Fairchild |
|---|---|
| Pages | 9 |
| File Size | 383.36 KB |
| Published | July 06, 2026 |
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Frequently Asked Questions
What is the typical on-state resistance (Rds(on)) for this MOSFET?
The typical static drain to source on resistance is 0.95 Ω @ V = 10V, I = 2.75A.
What is the maximum continuous drain current at optimal temperature?
At 25°C, the maximum continuous drain current (Id) is 5.5 A. This rating drops to 2.4 A at 100°C.
Is this MOSFET suitable for active power factor correction applications?
Yes, these devices are well suited for high-efficiency switched mode power supplies and active power factor correction.
What is the permitted operating temperature range?
The recommended Operating and Storage Temperature Range is -55 to +150°C.