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Texas Instruments CD74AC280, CD74ACT280 9-Bit Odd Even Parity Generator Checker Data Sheet User Manual

Summary

Harris Semiconductor CD74AC280 and CD74ACT280 datasheet (August 1998) documenting this 9-bit odd/even parity generator/checker utilizing Advanced CMOS logic technology. Features buffered inputs, 10ns typical propagation delay at 5V/25C with 50pF load, balanced propagation delays, and +/-24mA output drive current with fanout to 15 FAST ICs and 50-ohm transmission line driving. Exceeds 2kV ESD protection per MIL-STD-883 Method 3015 with SCR-latchup-resistant CMOS design. Even parity output indicat

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查询CD74AC280供应商

CD74AC280, CD74ACT280

Data sheet acquired from Harris Semiconductor SCHS250

August 1998 9-Bit Odd/Even Parity Generator/Checker

Features Description Buffered Inputs The CD74AC280 and CD74ACT280 9-bit odd/even parity

generator/checkers that utilize the Harris Advanced CMOS

Typical Propagation Delay

Logic technology. Bothe even and odd parity outputs are

10ns at VCC = 5V, TA = 25o C, CL = 50p F

available for checking or generating parity for words up to nine bits long. Even parity is indicated (∑Eoutput is HIGH)

Exceeds 2k V ESD Protection MIL-STD-883, Method

when an even number of data inputs is HIGH. Odd parity is indicated (∑O output is HIGH) when an odd number of data

SCR-Latchup-Resistant CMOS Process and Circuit inputs is HIGH. Parity checking for words larger than nine Design bits can be accomplished by tying the ∑E output to any input

of an additional AC/ACT280 parity checker.

Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption

Balanced Propagation Delays Ordering Information

AC Types Feature 1.5V to 5.5V Operation and PART TEMP. PKG.

Balanced Noise Immunity at 30% of the Supply NUMBER RANGE (o C) PACKAGE NO. CD74AC280E 0 to 70o C, -40 to 85, 14 Ld PDIP E14.3

±24m A Output Drive Current

-55 to 125

Fanout to 15 FAST™ ICs

CD74ACT280E 0 to 70o C, -40 to 85, 14 Ld PDIP E14.3

Drives 50Ω Transmission Lines

-55 to 125

CD74AC280M 0 to 70o C, -40 to 85, 14 Ld SOIC M14.15

-55 to 125

Pinout

CD74ACT280M 0 to 70o C, -40 to 85, 14 Ld SOIC M14.15

CD74AC280, CD74ACT280

-55 to 125

(PDIP, SOIC)

NOTES:

TOP VIEW

1. When ordering, use the entire part number. Add the suffix to obtain the variant in the tape and reel. 2. Wafer and die for this part number is available which meets all elec-

I6 VCC

trical specifications. Please contact your local sales office or Harris

I7 I5 customer service for ordering information.

NC I4

Functional Diagram

GND I0

∑ EVEN

∑ ODD

GND = 7 VCC = 14

NC = 3

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

File Number 1957.1

FAST™ is a Trademark of Fairchild Semiconductor. Copyright © Harris Corporation 1998

Page Summary Contents For Texas Instruments CD74AC280, CD74ACT280 9-Bit Odd Even Parity Generator Checker Data Sheet User Manual

Page 1 查询CD74AC280供应商 CD74AC280, CD74ACT280 Data sheet acquired from Harris Semiconductor SCHS250 August 1998 9-Bit Odd/Even Parity Generator/Checker Features Description Buffered Inputs The CD74AC280 and CD...
Page 2 CD74AC280, CD74ACT280 Absolute Maximum Ratings Thermal Information DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V Thermal Resistance (Typical, Note 5) θJA (o C/W) D...
Page 3 CD74AC280, CD74ACT280 DC Electrical Specifications (Continued) TEST -40o C TO -55o C TO CONDITIONS 25o C 85o C 125o C PARAMETER SYMBOL (V) IO (m A) (V) MIN MAX MIN MAX MIN MAX UNITSVI Low Level Output...
Page 4 CD74AC280, CD74ACT280 Switching Specifications Input tr, tf = 3ns, CL = 50p F (Worst Case) -40o C TO 85o C -55o C TO 125o C PARAMETER SYMBOL VCC (V) TYP MAX MIN TYP MAX UNITSMIN AC TYPES Propagation D...
Page 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain...