Fairchild 74F401 CRC Generator Checker Data Sheet
Summary
This programmable 16-bit integrated circuit is a Cyclic Redundancy Check (CRC) Generator and Checker. It provides advanced error detection for serial digital data communication by generating and validating check bits using eight selectable, customizable polynomials (e.g., CRC-16, CRC-CCITT). Designed for digital system designers, it integrates seamlessly into applications ranging from floppy disk storage systems to complex data handling circuits, ensuring data integrity during transmission with high reliability.
Page 1 Text Content
74F 401 C en erato r/C ecker
April 1988 Revised August 1999
74F401 CRC Generator/Checker General Description Features The 74F401 Cycle Redundancy Check (CRC) Generator/ Eight selectable polynomials Checker provides an advanced tool for implementing the
Error indicator
most widely used error detection scheme in serial digital
Separate preset and clear controls
data handling systems. A 3-bit control input selects one-of-
Automatic right justification
eight generator polynomials. The list of polynomials
includes CRC-16 and CRC-CCITT as well as their recipro- Fully compatible with all TTL logic families
cals (reverse polynomials). Automatic right justification is 14-pin package incorporated for polynomials of degree less than 16. Sepa-
9401 equivalent
rate clear and preset inputs are provided for floppy disk
Typical applications:
and other applications. The Error output indicates whether
or not a transmission error has occurred. Another control Floppy and other disk storage systems
input inhibits feedback during check word transmission. Digital cassette and cartridge systems The 74F401 is fully compatible with all TTL families.
Data communication systems
Ordering Code: Order Number Package Number Package Description 74F401SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F401PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol Connection Diagram
© 1999 Fairchild Semiconductor Corporation DS009534 www.fairchildsemi.com
Page Summary Contents For Fairchild 74F401 CRC Generator Checker Data Sheet
Manual Details
| Brand | Fairchild |
|---|---|
| Pages | 7 |
| File Size | 63.16 KB |
| Published | June 22, 2026 |
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Frequently Asked Questions
How is error detection performed using the 74F401?
Data and check bits are entered through D; if detectable errors occur, the Error Output (ER) goes HIGH.
What conditions are required to generate the check bits?
The Check Word Enable (CWE) input must be held HIGH while the data is being entered, and an external circuit gates the remaining bits.
How can I select different generating polynomials?
Use the Polynomial Select Inputs (S2, S1, S0). The unit has a 3-bit control input that selects one of eight generator polynomials.
Is the 74F401 compatible with other logic families?
Yes, the 74F401 is fully compatible with all TTL families.