Fairchild FQPF3P50 500V P-Channel MOSFET Specification Sheet (1)(1)

August 2000

QFETTM

FQPF3P50 500V P-Channel MOSFET General Description Features These P-Channel enhancement mode power field effect -1.9A, -500V, RDS(on) = 4.9Ω @VGS = -10 V transistors are produced using Fairchild’s proprietary, Low gate charge ( typical 18 n C) planar stripe, DMOS technology. Low Crss ( typical 9.5 p F) This advanced technology has been especially tailored to Fast switching minimize on-state resistance, provide superior switching 100% avalanche tested performance, and withstand high energy pulse in the

Improved dv/dt capability

avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on complimentary half bridge.

SD TO-220F

FQPF Series

Absolute Maximum Ratings TC = 25°C unless otherwise noted Symbol Parameter FQPF3P50 Units VDSS Drain-Source Voltage -500 ID Drain Current - Continuous (TC = 25°C) -1.9

- Continuous (TC = 100°C) -1.2

IDM Drain Current - Pulsed (Note 1) -7.6 VGSS Gate-Source Voltage ± 30 EAS Single Pulsed Avalanche Energy (Note 2) m J IAR Avalanche Current (Note 1) -1.9 EAR Repetitive Avalanche Energy (Note 1) 3.9 m J

dv/dt Peak Diode Recovery dv/dt (Note 3) -4.5 V/ns

PD Power Dissipation (TC = 25°C)

- Derate above 25°C 0.31 W/°C

TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C

Maximum lead temperature for soldering purposes,

TL °C

1/8" from case for 5 seconds

Thermal Characteristics Symbol Parameter Typ Max Units RθJC Thermal Resistance, Junction-to-Case 3.2 °C/W RθJA Thermal Resistance, Junction-to-Ambient 62.5 °C/W

©2000 Fairchild Semiconductor International Rev. A, August 2000