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Texas Instruments TPIC5223L Data Sheet

Summary

This integrated circuit is a robust, dual-channel gate-protected logic-level power DMOS array featuring two isolated N-channel transistors. It provides reliable power switching with low on-resistance ($0.38 \Omega$) and integrated high-current zener diodes for overstress protection. The manual details the absolute maximum ratings, electrical characteristics, and operational guidelines for designers requiring a stable, robust bidirectional interface in demanding electronic applications.

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TPIC5223L

2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL

POWER DMOS ARRAY

SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995

Low r DS(on) 0.38 Ω Typ D PACKAGE (TOP VIEW)

Voltage Output 60 V Input Protection Circuitry 18 V GND DRAIN1

Pulsed Current 3 A Per Channel SOURCE1 GATE1 GATE2 SOURCE2

Extended ESD Capability 4000 V

DRAIN2 NC

Direct Logic-Level Interface

NC – No internal connection

description The TPIC5223L is a monolithic gate-protected logic-level power DMOS array that consists of two electrically isolated independent N-channel enhancement-mode DMOS transistors. Each transistor features integrated high-current zener diodes (ZCXa and ZCXb) to prevent gate damage in the event that an overstress condition occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the human-body model of a 100-p F capacitor in series with a 1.5-kΩ resistor. The TPIC5223L is offered in a standard eight-pin small-outline surface-mount (D) package and is characterized for operation over the case temperature of –40°C to 125°C.

schematic

DRAIN1 DRAIN2GATE2

GATE1 ZC1b

ZC1a ZC2a

SOURCE1 GND SOURCE2

NOTE A: For correct operation, no terminal may be taken below GND.

Copyright  1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page Summary Contents For Texas Instruments TPIC5223L Data Sheet

Page 1 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 Low r DS(on) 0.38 Ω Typ D PACKAGE (TOP VIEW) Voltage Output 60 V Input Pro...
Page 2 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 absolute maximum ratings over operating case temperature range (unless oth...
Page 3 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 electrical characteristics, TC = 25°C (unless otherwise noted) PARAMETER T...
Page 4 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 resistive-load switching characteristics, TC = 25°C PARAMETER TEST CONDITI...
Page 5 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 PARAMETER MEASUREMENT INFORMATION VDD = 25 V tf1tr1 RL VDS Pulse Generator...
Page 6 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY at e- to -S rc re sh ld lt ag SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 (t PARAMETER MEASUREMENT INFORMATION VDD = 2...
Page 7 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 ta ti ra in -t -S rc (o er ce ta it TYPICAL CHARACTERISTICS -S ta te es is...
Page 8 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL ap ac it an ce POWER DMOS ARRAY ra in -t -S rc lt ag SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 TYPICAL CHARACTERISTICS CAPACITANCE SO...
Page 9 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 ax im ra in rr en THERMAL INFORMATION MAXIMUM DRAIN CURRENT MAXIMUM PEAK A...
Page 10 TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 Ju ct io -t -B ar er al es is ta ce /W JBθ THERMAL INFORMATION D PACKAGE† ...
Page 11 PACKAGE OPTION ADDENDUM www.ti.com 8-Apr-2005 PACKAGING INFORMATION Orderable Device Status Package Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Type Drawing Qty TPIC5223LD OBSOLETE SO...
Page 13 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and servic...

Manual Details

Brand Texas Instruments
Pages 13
File Size 285.66 KB
Published June 17, 2026
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Frequently Asked Questions

How is the TPIC5223L protected against voltage surges?

It includes integrated high-current zener diodes which provide up to 4000 V of ESD protection.

What are the operating temperature limits for this device?

The recommended operating case temperature range is –40°C to 125°C (C).

Are there any grounding restrictions during setup?

Yes, for correct operation, no terminal may be taken below the GND potential.

What voltage levels are needed to operate this DMOS array?

The gate-to-source voltage range is specified as –9 V to 18 V.