Texas Instruments SN75LVDS88B TFT LCD PANEL TIMING CONTROLLER WITH LVDS INTERFACE

查询SN75LVDS88B供应商 SN75LVDS88B

TFT LCD PANEL TIMING CONTROLLER

WITH LVDS INTERFACE SLLS407 – FEBRUARY 2000

Flatlink Interface Utilizes Low Power Low Voltage CMOS 3.3 V Technology Differential Signalling(LVDS)

65 MHz Phase-Lock Input

Suitable for Notebook Application

100-pin TQFP Package for Compact LCD

XGA Resolution Module Six Bit System Interface Tolerates 4 k V HBM ESD for LVDS Pins and

2 k V HBM for Others

Support Mainstream Data and Gate Drivers

Improved Jitter Tolerance

Optional Configurable Pins

description The SN75LVDS88B (LVDS panel timing controller) integrates a Flatlink signal interface with a TFT LCD timing controller. It resides in the LCD panel and provides interface between the graphic controller and a TFT LCD panel. The SN75LVDS88B accepts host data through 3 pairs of inputs (18-bits) making up the LVDS bus, which is a low-EMI high-throughput interface. SN75LVDS88B then reformats the received image data into a specific data format and synchronous timing suitable for driving LCD panel column and row drivers. This device supports XGA resolution. The SN75LVDS88B is easily configured by several selection terminals and is equipped with default timing specifications to support mainstream gate and source drivers on the market.

block diagram

Data Alignment

Source Data Format

Flatlink SYNC

(18-bit)

Timing Signal

CTRL Generator Interface

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Copyright  2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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