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Texas Instruments ADS5521 Specifications and User Guide

Summary

The ADS5521 is a high-performance, 12-bit Analog-to-Digital Converter (ADC) boasting a 105MSPS sample rate. Designed for robust system integration with low power dissipation, it features an internal reference and dedicated S&H stage. This manual details the unit's full technical specifications, pin compatibility across various ADS series chips, and operational parameters. It is ideal for high-speed applications including radar systems, video imaging, medical devices, and advanced communication infrastructure.

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ADS5521

SBAS309A–MAY 2004–REVISED APRIL

12-Bit, 105MSPS

Analog-To-Digital Converter

FEATURES TQFP-64 Power PAD™ Package

12-Bit Resolution Recommended Op Amps:

105MSPS Sample Rate THS3201, THS3202, THS4503, THS4509,•

THS9001, OPA695, OPA847•

High SNR: 70d BFS at 100MHz f IN

High SFDR: 86d Bc at 100MHz f IN

APPLICATIONS

2.3VPP Differential Input Voltage

Wireless Communication

Internal Voltage Reference

Communication Receivers

3.3V Single-Supply Voltage

Station Infrastructure

Analog Power Dissipation: 571m W Test and Measurement Instrumentation

Output Buffer Power: 165m W Single and Multichannel Digital Receivers

Pin-Compatible with: Communication Instrumentation•

ADS5500 (14-Bit, 125MSPS) Radar

ADS5541 (14-Bit, 105MSPS) Infrared

ADS5542 (14-Bit, 80MSPS)

Video and Imaging

ADS5520 (12-Bit, 125MSPS)

Medical Equipment

ADS5522 (12-Bit, 80MSPS)

Military Equipment

DESCRIPTION

The ADS5521 is high-performance, 12-bit, 105MSPS analog-to-digital converter (ADC). To provide complete

converter solution, it includes high-bandwidth linear sample-and-hold stage (S&H) and internal reference.

Designed for applications demanding the highest speed and highest dynamic performance in very little space,

the ADS5521 has excellent analog power dissipation of 571m W and output buffer power dissipation of 165m W

from 3.3V single-supply voltage. This allows an even higher system integration density. The provided internal

reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing

with common logic.

The ADS5521 is available in 64-pin TQFP Power PAD package and is pin-compatible with the ADS5500,

ADS5541, ADS5542, ADS5520, and ADS5522. This device is specified over the full temperature range of –40°C

to +85°C.

AVDD DRVDD

Timing Circuitry CLKOUT

VIN+ 12−Bit Digital D0.

Output

S&H Pipeline Error

Control

VIN− ADC Core Correction

Internal Control Logic

CM DFS

Reference

Serial Programming Register

ADS5521

AGND SDATA SCLK DRGNDSEN

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Power PAD is trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Copyright 2004–2005, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Page Summary Contents For Texas Instruments ADS5521 Specifications and User Guide

Page 1 ADS5521 SBAS309A–MAY 2004–REVISED APRIL 12-Bit, 105MSPS Analog-To-Digital Converter FEATURES TQFP-64 Power PAD™ Package 12-Bit Resolution Recommended Op Amps: 105MSPS Sample Rate THS3201, THS3202, THS...
Page 2 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Fai...
Page 3 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL ELECTRICAL CHARACTERISTICS Typical values given at TA +25°C, min and max specified over the full temperature range of –40°C to +85°C, AVDD DRVDD 3.3V...
Page 4 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL ELECTRICAL CHARACTERISTICS (continued) Typical values given at TA +25°C, min and max specified over the full temperature range of –40°C to +85°C, AVD...
Page 5 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL ELECTRICAL CHARACTERISTICS (continued) Typical values given at TA +25°C, min and max specified over the full temperature range of –40°C to +85°C, AVD...
Page 6 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL TIMING CHARACTERISTICS Typical values given at TA +25°C, min and max specified over the full temperature range of –40°C to +85°C, AVDD DRVDD 3.3V, sa...
Page 7 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL RESET TIMING CHARACTERISTICS Typical values given at TA +25°C, min and max specified over the full temperature range of –40°C to +85°C, AVDD DRVDD 3....
Page 8 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL t SLOADS t SLOADH t WSCLK t WSCLK t SCLK t OS t OH SDATA MSB LSB LSBMSB Figure 4. Serial Programming Interface Timing Diagram Table 1. Serial Program...
Page 9 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL PIN CONFIGURATION PAP PACKAGE HTQFP-64 (TOP VIEW) DRGND DRGND SCLK D1 SDATA D0 (LSB) SEN NC AVDD NC AGND CLKOUT AVDD DRGND ADS5521 AGND OE Power PAD ...
Page 10 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL PIN CONFIGURATION (continued) PIN ASSIGNMENTS TERMINAL NO. OF NAME NO. PINS I/O DESCRIPTION AVDD 24, 26, 28, 33, Analog power supply 14, 16, 18, 21,A...
Page 11 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL DEFINITION OF SPECIFICATIONS Offset Error Analog Bandwidth The offset error is the difference, given in number of The analog input frequency at which...
Page 12 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL Total Harmonic Distortion (THD) Two-Tone Intermodulation Distortion (IMD3) THD is the ratio of the power of the fundamental (PS) IMD3 is the ratio of...
Page 13 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL ag itu de gn itu de d B ag itu de TYPICAL CHARACTERISTICS Typical values given at TA +25°C, AVDD DRVDD 3.3V, sampling rate 105MSPS, 50% clock duty cy...
Page 14 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL ag ni tu ag itu de ag itu de TYPICAL CHARACTERISTICS (continued) Typical values given at TA +25°C, AVDD DRVDD 3.3V, sampling rate 105MSPS, 50% clock ...
Page 15 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL TYPICAL CHARACTERISTICS (continued) Typical values given at TA +25°C, AVDD DRVDD 3.3V, sampling rate 105MSPS, 50% clock duty cycle, DLL On, 3VPP diff...
Page 16 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL er is si at io TYPICAL CHARACTERISTICS (continued) Typical values given at TA +25°C, AVDD DRVDD 3.3V, sampling rate 105MSPS, 50% clock duty cycle, DL...
Page 17 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL ag ni tu de d B cc ur re nc er fo rm an ce d B TYPICAL CHARACTERISTICS (continued) Typical values given at TA +25°C, AVDD DRVDD 3.3V, sampling rate 1...
Page 18 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL TYPICAL CHARACTERISTICS am pl at am pe at Typical values given at TA +25°C, AVDD DRVDD 3.3V, sampling rate 105MSPS, 50% clock duty cycle, 3VPP differ...
Page 19 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL TYPICAL CHARACTERISTICS am (continued) pl at am pl at Typical values given at TA +25°C, AVDD DRVDD 3.3V, sampling rate 105MSPS, 50% clock duty cycle,...
Page 20 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL APPLICATION INFORMATION gate the sample through the pipeline every half clock THEORY OF OPERATION cycle. This process results in data latency of 16.5...
Page 21 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL This differential input topology produces high level Since the input signal must be biased around the of AC performance for high sampling rates. It a...
Page 22 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL When using single-ended operational amplifiers (such that these components be included in the ADS5521 as the THS3201, THS3202, OPA695, or OPA847) to ...
Page 23 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL INPUT VOLTAGE OVER-STRESS The device can be powered down by programming the internal register (see Serial Programming The ADS5521 can handle absolute...
Page 24 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL For high input frequency sampling, it is recommended to use clock source with very low jitter. Additionally, CM CM the internal ADC core uses both ed...
Page 25 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL INTERNAL DLL two's complement output format. For negative input overdrive, the output code is 0x000 in straight offset In order to obtain the fastest...
Page 26 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL Table 5. Timing Characteristics at Additional Sampling Frequencies (DLL ON)(1) t SETUP (ns) t HOLD (ns) t START (ns) t END (ns) tr (ns) tf (ns)f S (M...
Page 27 ADS5521 www.ti.com SBAS309A–MAY 2004–REVISED APRIL PROGRAMMING INTERFACE Assembly Process SERIAL 1. Prepare the PCB top-side etch pattern including The ADS5521 has internal registers that enable the e...
Page 28 PACKAGE OPTION ADDENDUM www.ti.com 19-May-2005 PACKAGING INFORMATION Orderable Device Status Package Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Type Drawing Qty ADS5521IPAP ACTIVE HT...
Page 30 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and servic...

Manual Details

Brand Texas Instruments
Pages 30
File Size 587.01 KB
Published July 12, 2026
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Frequently Asked Questions

What are the core specifications of the ADS5521?

It is a 12-bit, 105MSPS analog-to-digital converter packaged in a TQFP-64 PowerPAD package.

Is this model compatible with other Texas Instruments ADC boards?

Yes, it is pin-compatible with models such as the ADS5500, ADS5542, and ADS5520.

Are there specific handling requirements when installing the device?

The circuit can be damaged by ESD; users must handle all integrated circuits with appropriate anti-static precautions.