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Motorola MC10E256 MC100E256 Data Sheet (1) User Manual

Summary

This advanced semiconductor chip integrates powerful MUX-Latch functionality with differential outputs, offering precise control through select and enable signals. The comprehensive technical manual provides electronics engineers and hardware designers with all necessary details for implementation. Content includes detailed operational tables, pin configurations, crucial AC/DC electrical characteristics (such as timing delays), and mechanical specifications, ensuring reliable integration into professional digital logic circuits.

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SEMICONDUCTOR TECHNICAL DATA

The MC10E/100E256 contains three 4:1 multiplexers followed by transparent latches with differential outputs. Separate Select controls are provided for the leading 2:1 mux pairs (see logic symbol). When the Latch Enable (LEN) is LOW, the latch is transparent, and output data is controlled by the multiplexer select controls. A logic HIGH on LEN latches the outputs. The Master Reset (MR) overrides all other

controls to set the Q outputs LOW. 3-BIT 4:1 MUX-LATCH

950ps Max. D to Output 850ps Max. LEN to Output Split Select Differential Outputs Extended 100E VEE Range of – 4.2V to – 5.46V 75kΩ Input Pulldown Resistors

Pinout: 28-Lead PLCC (Top View) D1b D1a D2d D2c D2b D2a VCCO

FN SUFFIX PLASTIC PACKAGE CASE 776-02

SEL1A Q2

SEL1B Q2

SEL2 VCC

VEE Q1

LEN Q1

MR VCCO

D1d D0a D0b D0c D0d VCCO Q0

* All VCC and VCCO pins are tied together on the die.

FUNCTION TABLE PIN NAMES

Pin State Operation Pin Function SEL2 Output c/d Data D0x D2x Data Inputs SEL1A Input d Data SEL1A, SEL1B First-stage Select Inputs

SEL1B Input b Data SEL2 Second-stage Select input

LEN Latch Enable MR Master Reset Q0, Q0 Q2, Q2 Data Outputs

2–1 REV 2 Motorola, Inc. 1996

Page Summary Contents For Motorola MC10E256 MC100E256 Data Sheet (1) User Manual

Page 1 SEMICONDUCTOR TECHNICAL DATA The MC10E/100E256 contains three 4:1 multiplexers followed by transparent latches with differential outputs. Separate Select controls are provided for the leading 2:1 mux ...
Page 2 MC10E256 MC100E256 LOGIC DIAGRAM EN Q0 EN Q1 EN Q2 SEL1A SEL1B DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND) Symbol Characteristic min typ max min typ max min typ max Unit Conditio...
Page 3 MC10E256 MC100E256 AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND) Symbol Characteristic min typ max min typ max min typ max Unit Condition t PLH Propagation Delay to Output ps t PHL...
Page 4 MC10E256 MC100E256 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 776–02 ISSUE D 0.007 (0.180) –M SM Y BRK -N- 0.007 (0.180) –M SM G1X 0.010 (0.250) –M SS VIEW D-D 0.007 (0.180) –M SM 0.007 (0...
Page 5 MC10E256 MC100E256 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its p...
Page 6 WWW.ALLDATASHEET.COM Copyright © Each Manufacturing Company. All Datasheets cannot be modified without permission. This datasheet has been download from : www.All Data Sheet.com 100% Free Data Sheet S...

Manual Details

Brand Motorola
Pages 6
File Size 69.46 KB
Published June 06, 2026
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Frequently Asked Questions

How can I ensure the output data is cleared?

A logic HIGH on Master Reset (MR) overrides all other controls to set the Q outputs LOW.

What voltage range does this multiplexer support?

The extended operating voltage range is from –4.2V to –5.46V.

How does Latch Enable (LEN) control the output?

A logic HIGH on LEN latches the outputs based on the current state set by the multiplexer select controls.

What are the maximum propagation delays?

The max delay from D to Output is 950ps, and the max delay from LEN to Output is 850ps.