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MAXIM MAX1180 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs Data Sheet Manual User Guide

Summary

This manual details the MAX1180 ADC, a high-performance, dual 10-bit Analog-to-Digital Converter featuring 105 Msps sampling at 3.3V. Optimized for low power consumption and excellent signal integrity, it delivers robust conversion ideal for applications demanding deep signal digitization. It is designed for engineers in the fields of high-resolution imaging, instrumentation, and video processing who require precise data capture from single or differential analog inputs.

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Page 1 Text Content

19-2097; Rev 1; 2/07

EVALUATION KIT AVAILABLE

Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs General Description Features The MAX1180 is a 3.3V, dual 10-bit, analog-to-digital Single 3.3V Operation converter (ADC) featuring fully-differential wideband

Excellent Dynamic Performance

track-and-hold (T/H) inputs, driving two pipelined, nine-

58.5d B SNR at f IN = 20MHz

stage ADCs. The MAX1180 is optimized for low-power,

72d B SFDR at f IN = 20MHz

high-dynamic performance applications in imaging,

SNR Flat within 1d B for f IN = 20MHz to 100MHz

instrumentation, and digital communication applica- tions. The MAX1180 operates from a single 2.7V to 3.6V Low Power supply, consuming only 413m W, while delivering a typi- 125m A (Normal Operation) cal signal-to-noise ratio (SNR) of 58.5d B at an input fre- 2.8m A (Sleep Mode) quency of 20MHz and a sampling rate of 105Msps. The 1µA (Shutdown Mode) T/H driven input stages incorporate 400MHz (-3d B)

0.02d B Gain and 0.25° Phase Matching (typ)

input amplifiers. The converters may also be operated

Wide ±1VP-P Differential Analog Input Voltage

with single-ended inputs. In addition to low operating

Range

power, the MAX1180 features a 2.8m A sleep mode, as well as a 1µA power-down mode to conserve power 400MHz, -3d B Input Bandwidth during idle periods.

On-Chip 2.048V Precision Bandgap Reference

An internal 2.048V precision bandgap reference sets

User-Selectable Output Format—Two’s

the full-scale range of the ADC. A flexible reference

Complement or Offset Binary

structure allows the use of the internal or external

48-Pin TQFP Package with Exposed Pad for

reference, if desired for applications requiring

Improved Thermal Dissipation

increased accuracy or a different input voltage range.

GN RE FN

The MAX1180 features parallel, CMOS-compatible Ordering Information

RE FP

three-state outputs. The digital output format is set to

RE FI

PART TEMP RANGE PIN-PACKAGE

two’s complement or straight offset binary through a

GN RE FO UT

single control pin. The device provides for a separate T/ D9 MAX1180ECM -40°C to +85°C 48 TQFP-EP*

output power supply of 1.7V to 3.6V for flexible interfac- SL EE D8

MAX1180ECM+ -40°C to +85°C 48 TQFP-EP* ing. The MAX1180 is available in a 7mm ✕ PD 7mm, 48-pin D7 +Denotes a lead-free and Ro HS-compliant package. OE D6

TQFP package, and is specified for the extended

D9 D5 *EP = Exposed paddle.

industrial (-40°C to +85°C) temperature range.

Pin Configuration

Pin-compatible higher and lower speed versions of the D7 D3

MAX1180 are also available. Please refer to the D6 D2

MAX1181 data sheet for 80Msps, the MAX1182 data sheet for 65Msps, the MAX1183 data sheet for 40Msps, and the MAX1184 data sheet for 20Msps. In addition to these speed grades, this family includes a 20Msps mul- COM D1A

tiplexed output version (MAX1185), for which digital VDD D0A

data is presented time-interleaved on a single, parallel GND OGND INA+ OVDD

10-bit output port.

INA- OVDD

Applications VDD OGND

MAX1180

GND D0B

High Resolution Imaging INB- D1B

INB+ D2B

I/Q Channel Digitization

GND D3B

Multichannel IF Undersampling VDD D4B CLK D5B

Instrumentation Video Application

48 TQFP-EP

Functional Diagram appears at end of data sheet.

NOTE: THE PIN 1 INDICATOR FOR LEAD-FREE PACKAGES IS REPLACED BY A "+" SIGN.

Maxim Integrated Products

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Page Summary Contents For MAXIM MAX1180 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs Data Sheet Manual User Guide

Page 1 19-2097; Rev 1; 2/07 EVALUATION KIT AVAILABLE Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs General Description Features The MAX1180 is a 3.3V, dual 10-bit, an...
Page 2 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs ABSOLUTE MAXIMUM RATINGS VDD, OVDD to GND ...............................................-0.3V to +3.6V Continuou...
Page 3 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs ELECTRICAL CHARACTERISTICS (continued) (VDD = 3.3V, OVDD = 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and ...
Page 4 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs ELECTRICAL CHARACTERISTICS (continued) (VDD = 3.3V, OVDD = 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and ...
Page 5 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs ELECTRICAL CHARACTERISTICS (continued) (VDD = 3.3V, OVDD = 2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and ...
Page 6 AM PL IT UD (d B) AM PL IT UD (d B) AM PL IT UD (d B) Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs Typical Operating Characteristics (VDD = 3.3V, OVDD = 2.5V,...
Page 7 TH (d Bc TH (d Bc GA IN (d B) Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs Typical Operating Characteristics (continued) (VDD = 3.3V, OVDD = 2.5V, internal re...
Page 8 DD (m A) DN (L SB Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC SN R/ SI NA D, -T HD /S FD (d B, Bc with Internal Reference and Parallel Outputs Typical Operating Characteristics (continued) (VDD = 3.3V, ...
Page 9 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs EF OU T ( V) Typical Operating Characteristics (continued) (VDD = 3.3V, OVDD = 2.5V, internal reference, differen...
Page 10 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs Pin Description (continued) PIN NAME FUNCTION D9B Three-State Digital Output, Bit 9 (MSB), Channel B D8B Three-St...
Page 11 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs VIN VOUTx2Σ VIN VOUTx2Σ FLASH FLASH DAC DAC ADC ADC 1.5 BITS 1.5 BITS 2-BIT FLASH 2-BIT FLASH ADC ADC STAGE 1 STA...
Page 12 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs INTERNAL BIAS COM INTERNAL COM BIAS HOLD HOLD INTERNAL INTERNAL TRACK TRACK NONOVERLAPPING BIAS COM CLOCK SIGNALS...
Page 13 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs 5 CLOCK-CYCLE LATENCY ANALOG INPUT t CLK CLOCK INPUT t D0 t CH t CL DATA OUTPUT N - 6 N - 5 N - 4 N - 3 N - 2 N -...
Page 14 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs where f IN represents the analog input frequency and t AJ is the time of the aperture jitter. OE Clock jitter is ...
Page 15 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs LOWPASS FILTER MAX4108 0.1µF RISO 300Ω CIN INPUT LOWPASS FILTER MAX4108 MAX4108 INA- RISO CIN 0.1µF 50Ω 22p F MAX...
Page 16 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs quadrature (Q) carrier component, where the Q compo- 25Ω nent is 90 degrees phase-shifted with respect to the in-...
Page 17 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs 1kΩ RISO MAX4108 RISO 50Ω CIN 22p F MAX1180 1kΩ RISO MAX4108 RISO 50Ω CIN 22p F Figure 7. Using an Op Amp for Sin...
Page 18 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs The ideal, theoretical minimum analog-to-digital noise is caused by quantization error only and results directly ...
Page 19 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs Functional Diagram VDD OGND GND OVDD PIPELINE OUTPUT DEC D9A–D0A T/H DRIVERS CLK CONTROL OUTPUT T/H DECPIPELINE D...
Page 20 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. F...
Page 21 Dual 10-Bit, 105Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current speci...

Manual Details

Brand Dual
Pages 21
File Size 539.40 KB
Published May 28, 2026
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Frequently Asked Questions

What are the maximum operating temperatures?

The operational temperature range is from -40°C to +85°C.

How can I conserve power when not in use?

The MAX1180 offers a 2.8mA sleep mode and a minimal 1µA power-down (shutdown) mode.

Are there different speed grades available for this ADC family?

Yes, higher and lower speed versions include the MAX1181 (80Msps), MAX1182 (65Msps), MAX1183 (40Msps), and MAX1184 (20Msps).

What is the typical Signal-to-Noise Ratio (SNR) performance?

It delivers a typical SNR of 58.5dB at an input frequency of 20MHz.