# A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

LINEAR LTC694-3.3 Data Sheet LTC695-3.3 Data Sheet

Summary

This advanced supervisory circuit, LTC694-3.3/LTC695-3.3, is designed for mission-critical 3.3V microprocessor systems requiring robust power management in low-power applications. It provides comprehensive protection features including power-on reset, battery backup capabilities, RAM write protection, and watchdog timing. The manual details its precision voltage monitoring (down to 1V) and ultra-low supply current (200μA typical), making it ideal for designers building smart instruments, intelligent controllers, or battery-powered industrial equipment where reliable system uptime is essential.

📄 Preview PAGE OF 16

Page 1 Text Content

查询LTC694-3.3供应商

LTC694-3.3/LTC695-3.3 3.3V Microprocessor Supervisory Circuits

FEATURES DESCRIPTIO UL Recognized File # E145770 The LTC®694-3.3/LTC695-3.3 provide complete 3.3V Guaranteed Reset Assertion at VCC = 1V power supply monitoring and battery control functions. Pin Compatible with LTC694/LTC695 These include power-on reset, battery back-up, RAM write

for 3.3V Systems protection, power failure warning and watchdog timing. 200µA Typical Supply Current The devices are pin compatible upgrades of the LTC694/ Fast (30ns Typ) On-Board Gating of LTC695 that are optimized for 3.3V systems. Operating RAM Chip Enable Signals power consumption has been reduced to 0.6m W (typical) SO-8 and S16 Packages and 3µW maximum in battery back-up mode. Micropro- 2.90V Precision Voltage Monitor cessor reset and memory write protection are provided Power OK/Reset Time Delay: 200ms or Adjustable when the supply falls below 2.9V. The RESET output is Minimum External Component Count guaranteed to remain logic low with VCC as low as 1V.

1µA Maximum Standby Current

The LTC694-3.3/LTC695-3.3 power the active RAMs with

Voltage Monitor for Power-Fail or

a charge pumped NMOS power switch to achieve low

Low-Battery Warning

dropout and low supply current. When primary power is

Thermal Limiting

lost, auxiliary power, connected to the battery input pin,

Performance Specified Over Temperature

powers the RAMs in standby through an efficient PMOS switch.

APPLICATIO S

For an early warning of impending power failure, the

RE SE OU TP UT OL TA GE (V

3.3V Low Power Systems LTC694-3.3/LTC695-3.3 provide an internal comparator Critical µP Power Monitoring with a user-defined threshold. An internal watchdog timer Intelligent Instruments is also available, which forces the reset pins to active Battery-Powered Computers and Controllers states when the watchdog input is not toggled prior to a Automotive Systems preset time-out period. , LTC and LT are registered trademarks of Linear Technology Corporation.

TYPICAL APPLICATIO

RESET Output Voltage vs Supply Voltage

VIN ≥ 5V LT1129-3.3

VIN VOUT VOUTVCC POWER TO µP CMOS RAM POWER 1µF 100µF 0.1µF 0.1µF

OUT SENSE LTC695-3.3

µP SHDN SYSTEM

GND VBATT CE IN DECODER OUTPUT CE OUT RAM CS

51k RESET µP RESET PFO µP NMI

PFI WDI I/O LINE GND

18k MICROPROCESSOR RESET, BATTERY BACK-UP,

RAM WRITE PROTECTION, POWER WARNING AND WATCHDOG TIMING ARE ALL IN A SINGLE CHIP FOR 3.3V MICROPROCESSOR SYSTEM 0.1µF

694/5-3.3 TA01

SUPPLY VOLTAGE (V)

694/5-3.3 TA02

Page Summary Contents For LINEAR LTC694-3.3 Data Sheet LTC695-3.3 Data Sheet

Page 1 查询LTC694-3.3供应商 LTC694-3.3/LTC695-3.3 3.3V Microprocessor Supervisory Circuits FEATURES DESCRIPTIO UL Recognized File # E145770 The LTC®694-3.3/LTC695-3.3 provide complete 3.3V Guaranteed Reset Assert...
Page 2 LTC694-3.3/LTC695-3.3 XI ARBSOLUTE TI (Notes 1 and 2) Terminal Voltage VOUT Output Current Short-Circuit Protected VCC 0.3V to 6V Power Dissipation 500m W VBATT 0.3V to 6V Operating Temperature Range ...
Page 3 LTC694-3.3/LTC695-3.3 ELECTRICAL CHARA TERISTICS The ● denotes specifications which apply over the operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, VBATT = 2V, unles...
Page 4 LTC694-3.3/LTC695-3.3 ELECTRICAL CHARA TERISTICS The ● denotes specifications which apply over the operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, VBATT = 2V, unles...
Page 5 RE SE AC TI VE IM (m s) OU TP UT OL TA GE (V PF OU TP UT OL TA GE (V LTC694-3.3/LTC695-3.3 PERFOR ATYPICAL CE CHARA TERISTICS Power Failure Input Threshold Output Voltage vs Load Current vs Temperatur...
Page 6 LTC694-3.3/LTC695-3.3 PI FU CTIO S VCC: 3.3V Supply Input. The VCC pin should be bypassed every preset time-out period (see Figure 11). The reset with a 0.1µF capacitor. active time is adjustable on t...
Page 7 LTC694-3.3/LTC695-3.3 PI FU CTIO S OSC IN: Oscillator Input. OSC IN can be driven by an Information section). When OSC SEL is high or floating, external clock signal or an external capacitor can be th...
Page 8 LTC694-3.3/LTC695-3.3 PPLICATI SA FOR ATIO Microprocessor Reset Battery Switchover The LTC694-3.3/LTC695-3.3 use a bandgap voltage refer- The battery switchover circuit compares VCC to the VBATT ence ...
Page 9 LTC694-3.3/LTC695-3.3 PPLICATI SA FOR ATIO ANY PNP POWER TRANSISTOR VOUT – VBATT 3.3V VCC VOUT BATT ON 3.3V VCC VOUT 0.1µF 0.1µF 0.1µF LTC694-3.3 0.1µF LTC695-3.3 LTC695-3.3 VBATT VBATT 2.4V GND Figur...
Page 10 LTC694-3.3/LTC695-3.3 PPLICATI SA FOR ATIO 10Ω Table 1 shows the state of each pin during battery back-up. VBATT When the battery switchover section is not used, connect 2.7M 0.1µF LTC694-3.3 VBATT to...
Page 11 LTC694-3.3/LTC695-3.3 PPLICATI SA FOR ATIO 3.3V VCC VOUT VCC comparing the power failure input (PFI) with an internal LTC695-3.3 10µF 1.3V reference. CE OUT CS GND PFO goes low when the voltage at the...
Page 12 LTC694-3.3/LTC695-3.3 PPLICATI SA FOR ATIO R1 =.3 850m VHYSTERESIS R3 VCCVBATT LOW-BATTERY SIGNAL R3 ≈ 3.88 R1 R1 TO µP I/O PIN LTC695-3.3 Choose R3 = 200k and R1 = 51k. Also select R4 = 10k PFI which...
Page 13 LTC694-3.3/LTC695-3.3 PPLICATI SA FOR ATIO VCC = 3.3V WDI t1 = RESET ACTIVE TIME t2 = NORMAL WATCHDOG TIME-OUT PERIOD t3 = WATCHDOG TIME-OUT PERIOD IMMEDIATELY AFTER A RESET RESET Figure 11. Watchdog ...
Page 14 LTC694-3.3/LTC695-3.3 PPLICATI SA FOR ATIO Table 2. LTC695-3.3 Reset Active Time and Watchdog Time-Out Selections WATCHDOG TIME-OUT PERIOD RESET ACTIVE TIME IMMEDIATELY NORMAL AFTER RESET OSC SEL OSC ...
Page 15 LTC694-3.3/LTC695-3.3 PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.400* (10.160) 0.300 – 0.325 0.045 – 0...
Page 16 LTC694-3.3/LTC695-3.3 PPLICATITYPICAL Write Protect for Additional RAMs 3.3V VCC VOUT VCC 0.1µF 10µF 0.1µF LH5168SH LTC695-3.3 RAM A CE OUT CS 30ns PROPAGATION VBATT DELAY CE IN CS A LOW LINE VCC 0.1µ...

Manual Details

Brand Linear
Pages 16
File Size 142.89 KB
Published June 03, 2026
51 views

Enter the captcha to get the download link:

captcha

Frequently Asked Questions

How does the device handle impending power failure events?

It provides low-battery warning dropout using an efficient PMOS switch or a charge pumped NMOS power switch.

What is the minimum voltage where critical signals are guaranteed to function?

The output is guaranteed to remain logic low even when the supply voltage drops as low as 1V.

How can I monitor for system failure in complex applications?

It offers an integrated watchdog timer, power warning features, and microprocessor reset capability in a single chip.

What are the typical current consumption levels of this module?

The typical supply current is 200µA, while the maximum standby current is only 1µA.