LINEAR AN120-1 Data Sheet

Application Note 120

March 2010

1ppm Settling Time Measurement for a Monolithic 18-Bit DAC When Does the Last Angel Stop Dancing on a Speeding Pinhead? Jim Williams Introduction DAC INPUT

SETTLING TIME

(ALL BITS)

Performance requirements for instrumentation, function

generation, inertial navigation systems, trimming, calibra- RING TIME

tors, ATE, medical apparatus and other precision applications are beginning to eclipse capabilities of 16-bit data convert- ALLOWABLE

OUTPUT

ers. More specifi cally, 16-bit digital-to-analog converters

ERROR (DACs) have been unable to provide required resolution in BAND

DAC OUTPUT

an increasing number of ultra-precision applications.

DELAY TIME AN120 F01

New components (see Components for 18-bit Digital-

to-Analog Conversion, page 2) have made 18-bit DACs Figure 1. DAC Settling Time Components Include Delay, Slew and Ring Times. Fast Amplifi ers Reduce Slew Time, Although

a practical design alternative1. These ICs provide 18-bit

Longer Ring Time Usually Results. Delay Time is Normally a

performance at reasonable cost compared to previous

Small Term

modular and hybrid technologies. The monolithic DACs

distinct components. The delay time is very small and is

DC and AC specifi cations approach or equal previous

almost entirely due to propagation delay through the DAC

converters at signifi cantly lower cost.

and output amplifi er. During this interval, there is no output DAC Settling Time movement. During slew time, the output amplifi er moves at its highest possible speed towards the fi nal value. Ring

DAC DC specifi cations are relatively easy to verify. Measure-

time defi nes the region where the amplifi er recovers from

ment techniques are well understood, albeit often tedious.

slewing and ceases movement within some defi ned error

AC specifi cations require more sophisticated approaches

band. There is normally a trade-off between slew and ring

to produce reliable information. In particular, the settling

time. Fast slewing amplifi ers generally have extended

time of a DAC and its output amplifi er is extraordinarily

ring times, complicating amplifi er choice and frequency

diffi cult to determine to 18-bit (4ppm) resolution. DAC set-

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

tling time is the elapsed time from input code application

All other trademarks are the property of their respective owners.

until the output arrives at, and remains within, a speci-

Note 1. See Appendix A, “A History of High Accuracy Digital-to-Analog

fi ed error band around the fi nal value. To measure a new Conversion”.

18-bit DAC, a settling time measurement technique has Note 2. A historical note is in order. In early 1997, LTC’s DAC design group tasked the author to measure 16-bit DAC settling time. The result

been developed with 20-bit (1ppm) resolution for times as

was published in July 1998 as Application Note 74, “Component and

short as 265ns. The new method will work with any DAC.

Measurement Advances Ensure 16-Bit DAC Settling Time”. Almost

Realizing this measurement capability and its performance exactly 10 years later, the DAC group raised the ante, requesting 18-bit

verifi cation has required an unusually intense, extensive DAC settling time measurement. This constitutes 2 bits of resolution improvement per decade of author age. Since it was unclear how many

and protracted effort. Hopefully, the data converter com-

decades the author (born 1948) had left, it was decided to double jump

munity will fi nd the results useful2.

the performance requirement and attempt 20-bit resolution. In this way, even if the author is unavailable in 10 years, the DAC group will still get its

DAC settling time is usually specifi ed for a full-scale 10V

remaining 2 bits.

transition. Figure 1 shows that DAC settling time has three

an120f

AN120-1