Fairchild Semiconductor FAN5026 Dual DDR Dual-Output PWM Controller Data Sheet
Summary
This high-performance PWM controller provides an integrated dual solution for powering DDR memory in demanding applications. It features reliable and highly efficient regulation of two system voltages using advanced modes like DDR and out-of-phase operation, ensuring stable power for complex components. The comprehensive manual guides engineers through implementation details, covering signal definitions, wiring diagrams, functional specifications, protective measures (OV/UV protection), and voltage tracking schemes. This IC is ideal for designers building high-performance desktop computers, graphics cards, and servers that require a robust, energy-efficient core memory power solution.
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FA 5026 D al D /D al-O tp t P tro ller
October 2005
FAN5026 Dual DDR/Dual-Output PWM Controller Features General Description Highly flexible dual synchronous switching PWM The FAN5026 PWM controller provides high efficiency controller includes modes for: and regulation for two output voltages adjustable in the
DDR mode with in-phase operation for reduced range from 0.9V to 5.5V that are required to power I/O, channel interference chip-sets, and memory banks in high-performance com- puters, set top boxes, and VGA cards. Synchronous rec-
90° phase shifted two-stage DDR Mode for reduced
tification contributes to high efficiency over a wide range
input ripple
of loads. Efficiency is even further enhanced by using
Dual Independent regulators 180° phase shifted
MOSFET’s R as a current sense component.
DS(ON)
Complete DDR Memory power solution
Feed-forward ramp modulation, average current mode
VTT Tracks VDDQ/2
control scheme, and internal feedback compensation
VDDQ/2 Buffered Reference Output
provide fast response to load transients. Out-of-phase
Lossless current sensing on low-side MOSFET or operation with 180° phase shift reduces input current Precision current sensing using sense resistor ripple. The controller can be transformed into a com-
VCC Under-voltage Lockout plete DDR memory power supply solution by activating a Wide power input range: 3 to 16V designated pin. In DDR mode of operation one of the channels tracks the output voltage of another channel
Excellent dynamic response with Voltage
and provides output current sink and source capability —
Feed-Forward and Average Current Mode control
features essential for proper powering of DDR chips. The
Power-Good Signal
buffered reference voltage required by this type of mem-
Supports DDR-II and HSTL
ory is also provided. The FAN5026 monitors these out-
TSSOP28 package puts and generates separate PGx (power good) signals
when the soft-start is completed and the output is within
Applications ±10% of its set point. A built-in over-voltage protection
prevents the output voltage from going above 120% of
DDR V and V voltage generation DDQ TT
the set point. Normal operation is automatically restored
Desktop computer
when the over-voltage conditions go away. Under-volt-
Graphics cards
age protection latches the chip off when either output drops below 75% of its set value after the soft-start sequence for this output is completed. An adjustable over-current function monitors the output current by sensing the voltage drop across the lower MOSFET. If precision current-sensing is required, an external cur- rent-sense resistor may optionally be used.
Ordering Information
Part Number Temperature Range Package Packing FAN5026MTC -40°C to 85°C TSSOP-28 Rails FAN5026MTCX -40°C to 85°C TSSOP-28 Tape and Reel
©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5026 Rev. 1.0.5
Page Summary Contents For Fairchild Semiconductor FAN5026 Dual DDR Dual-Output PWM Controller Data Sheet
Manual Details
| Brand | Fairchild |
|---|---|
| Pages | 17 |
| File Size | 174.03 KB |
| Published | June 16, 2026 |
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Frequently Asked Questions
What voltage range can the two outputs be regulated at?
Each output voltage is adjustable within a range from 0.9V to 5.5V.
How does the controller protect against extreme voltage conditions?
It includes over-voltage protection (above 120%) and under-voltage protection, which latches the chip off if the output drops below 75% of its set value.
What efficiency modes are available for optimal operation?
Operating options include in-phase mode, 90° phase shifted two-stage DDR Mode, or 180° phase shifted MOSFETs for enhanced efficiency.