FAIRCHILD Interfacing to MM74HC High-Speed CMOS Logic Data Sheet

Interfacing to 74H igh-S peed Logic -314

Fairchild Semiconductor

Interfacing to MM74HC

April

High-Speed CMOS Logic

This application note pertains to the VHC Speciality Function devices only (listed in this section of the databook). These devices are direct pin, function and spec replacements for their MM74HC counterparts.

On many occasions it might be necessary to interface 2.4V (2.7V for LSTTL). High-speed CMOS’s logic “1” input MM74HC logic to other types of logic or to some other con- level is 3.5V (VCC=5.0V), so TTL is not guaranteed to pull

trol circuitry. HC-CMOS can easily be interfaced to any other valid CMOS logic “1” level. If the TTL circuit is only driving logic family including 74LS TTL, MM74C, CD4000 CMOS CMOS, its output voltage is usually about 3.5V. HC-CMOS and 10,000 ECL logic. Logic interfacing can be sub-divided typically recognizes levels greater than 3V as logic high, so into two basic categories: interfacing circuitry operating at in most instances TTL can drive MM74HC. the same supply voltage and interfacing to circuitry operating

To see why TTL does not pull up further, Figure shows

on different voltage. In the latter case, some logic level

typical standard TTL gate’s output schematic. As the output

translation is usually required, but many easily available cir-

pulls up, it can go no higher than two diode voltage drops be-

cuits simplify this task. Usually, both instances require little or

low VCC due to Q2 and D2. So when operating with 5V

no external circuitry.

supply, the TTL output cannot go much higher than about 3.5V. Figure shows an LSTTL gate, which has an output

Interfacing Between TTL and MM74HC Logic

structure formed by Q2 and Q4. As the LSTTL output goes

This high-speed CMOS family can operate from 2–6V, how- high, these two transistors cannot pull higher than two ever, in most applications which interface to TTL, both logic base-emitter voltage drops below VCC, and, as above, the families will probably operate off the same 5V TTL supply. output cannot go much higher than 3.5V. If the output of ei- The interconnection can be broken down into two cate- ther the LSTTL or TTL gate is loaded or the off sink transistor gories: TTL outputs driving CMOS inputs, and CMOS out- has some collector leakages, the output voltage will be puts driving TTL inputs. In both cases the interface is very lower. simple.

Many LSTTL and ALSTTL circuits take R2 of Figure and in-

In the first case, TTL driving HC, there are some minor differ- stead of connecting it to ground, it is connected to the output. ences in TTL specifications for totem-pole outputs and This enables the TTL output to go to 4.3V (VCC=5.0V) which high-speed CMOS input specifications. The TTL output low is more than adequate to drive CMOS. simple measure- level is completely compatible with the MM74HC input low, ment of open circuit VOH can verify this circuit configuration. but TTL outputs are specified to have an output high level of

AN005053-19

AN005053-20

FIGURE 1. Schematic Diagrams for Typical (a) Standard and

(b) Low Power Schottky TTL Outputs

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