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Texas Instruments TPIC5303 3-Channel Independent Gate-Protected Power DMOS Array Owner's Manual

Summary

This technical manual details the TPIC5303, a 3-channel gate-protected power DMOS array designed for high-voltage applications. Ideal for circuit designers and engineers, it describes the integrated zener diodes that offer 4000 V ESD protection and the device's robust specifications for switching and pulse current handling.

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Page 1 Text Content

TPIC5303

3-CHANNEL INDEPENDENT GATE-PROTECTED

POWER DMOS ARRAY

SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995

Low r DS(on) 0.4 Ω Typ D PACKAGE

(TOP VIEW)

High Voltage Output 60 V Extended ESD Capability 4000 V

DRAIN2 GATE1

Pulsed Current 5 A Per Channel

DRAIN2 SOURCE1

Fast Commutation Speed

SOURCE2 SOURCE1 SOURCE2 DRAIN1

description

GATE2 DRAIN1 DRAIN3 SOURCE3

The TPIC5303 is a monolithic gate-protected

DRAIN3 SOURCE3

power DMOS array that consists of three

GND GATE3

independent electrically isolated N-channel enhancement-mode DMOS transistors. Each transistor features integrated high-current zener diodes (ZCXa and ZCXb) to prevent gate damage in the event that an overstress condition occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the human-body model of a 100-p F capacitor in series with a 1.5-kΩ resistor. The TPIC5303 is offered in a standard 16-pin small-outline surface-mount (D) package and is characterized for operation over the case temperature range of –40°C to 125°C.

schematic

DRAIN1 DRAIN2 GATE3 DRAIN3GATE2

GATE1

ZC1b ZC2b

ZC1a ZC2a ZC3a

14, 15 3, 4 10, 11 SOURCE1 GND SOURCE2 SOURCE3

NOTE A: For correct operation, no terminal pin may be taken below GND.

PRODUCTION DATA information is current as of publication date. Copyright  1995, Texas Instruments Incorporated

Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page Summary Contents For Texas Instruments TPIC5303 3-Channel Independent Gate-Protected Power DMOS Array Owner's Manual

Page 1 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 Low r DS(on) 0.4 Ω Typ D PACKAGE (TOP VIEW) High Voltage Output 60 V Extended ESD Capa...
Page 2 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 absolute maximum ratings over operating case temperature range (unless otherwise noted...
Page 3 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 electrical characteristics, TC = 25°C (unless otherwise noted) PARAMETER TEST CONDITIO...
Page 4 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 resistive-load switching characteristics, TC = 25°C PARAMETER TEST CONDITIONS MIN TYP ...
Page 5 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 PARAMETER MEASUREMENT INFORMATION VDD = 25 V tf1tr1 RL 10 V Pulse Generator 0 V td(off...
Page 6 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 at e- to -S rc re sh ld lt ag (t PARAMETER MEASUREMENT INFORMATION VDD = 25 V Pulse Ge...
Page 7 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 er ce ta it ta ti ra in -t -S rc TYPICAL CHARACTERISTICS (o -S ta te es is ta ce STATI...
Page 8 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 ra in -t -S rc lt ag ap ac it an ce TYPICAL CHARACTERISTICS SOURCE-TO-DRAIN DIODE CURR...
Page 9 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 THERMAL INFORMATION MAXIMUM DRAIN CURRENT DRAIN-TO-SOURCE VOLTAGE TC = 25°C ax im ea v...
Page 10 TPIC5303 3-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY SLIS039A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995 THERMAL INFORMATION Ju ct io -t -B ar er al es is ta ce /W JBθ D PACKAGE† JUNCTION-TO-...
Page 11 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain...

Manual Details

Brand Texas Instruments
Pages 11
File Size 197.40 KB
Published June 15, 2026
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Frequently Asked Questions

What is the maximum output voltage for each channel?

Each channel can handle up to 60 V drain-to-source.

What is the purpose of the integrated zener diodes?

They prevent gate damage from overstress and provide up to 4000 V ESD protection.

What is the maximum pulsed current per channel?

It can handle a pulsed drain current of 5 A per channel.

What is the operating temperature range?

It is characterized for operation from -40°C to 125°C case temperature.

What is the typical on-state resistance?

The typical drain-to-source on-state resistance is 0.4 Ω.