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Texas Instruments SN74LVC1G79 Single Positive-Edge-Triggered D-Type Flip-Flop Owner's Manual

Summary

This highly versatile D-type flip-flop is engineered for robust digital signal processing across 1.65V to 5.5V operation. Featuring breakthrough NanoStar/NanoFree packaging, it ensures high performance with minimal footprint and extremely low power consumption, ideal for modern compact designs. The manual provides comprehensive technical details, including extensive electrical specifications, advanced anti-latchup protection, detailed ordering information, and crucial PCB design guidelines. This component is essential for engineers integrating reliable, partial-power-down digital logic into demanding electronic systems.

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SN74LVC1G79

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SCES220M – APRIL 1999 – REVISED JANUARY 2003

Available in the Texas Instruments DBV OR DCK PACKAGE (TOP VIEW)

Nano Star and Nano Free Packages Supports 5-V VCC Operation

Inputs Accept Voltages to 5.5 V

Max tpd of 4 ns at 3.3 V GND Low Power Consumption, 10-µA Max ICC

±24-m A Output Drive at 3.3 V YEA OR YZA PACKAGE (BOTTOM VIEW)

Ioff Supports Partial-Power-Down Mode Operation

Latch-Up Performance Exceeds 100 m A Per CLK JESD 78, Class II VCC ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101)

description/ordering information This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output. Nano Star and Nano Free package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

ORDERABLE TOP-SIDE

TA PACKAGE†

PART NUMBER MARKING‡

Nano Star

Reel of 3000 SN74LVC1G79YEAR

WCSP (DSBGA) – YEA

_ _ _ CR

Nano Free

Reel of 3000 SN74LVC1G79YZAR

WCSP (DSBGA) – YZA (Pb-free)

–40°C to 85°C

Reel of 3000 SN74LVC1G79DBVR

SOT (SOT 23) DBV C79 -

Reel of 250 SN74LVC1G79DBVT Reel of 3000 SN74LVC1G79DCKR

SOT (SC 70) DCK CR -

Reel of 250 SN74LVC1G79DCKT

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Nano Star and Nano Free are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Copyright  2003, Texas Instruments Incorporated

Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page Summary Contents For Texas Instruments SN74LVC1G79 Single Positive-Edge-Triggered D-Type Flip-Flop Owner's Manual

Page 1 SN74LVC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES220M – APRIL 1999 – REVISED JANUARY 2003 Available in the Texas Instruments DBV OR DCK PACKAGE (TOP VIEW) Nano Star and Nano Free Pack...
Page 2 SN74LVC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES220M – APRIL 1999 – REVISED JANUARY 2003 FUNCTION TABLE INPUTS OUTPUT CLK logic diagram (positive logic) TG TG TG absolute maximum ratin...
Page 3 SN74LVC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES220M – APRIL 1999 – REVISED JANUARY 2003 recommended operating conditions (see Note 4) MIN MAX UNIT Operating 1.65 5.5 VCC Supply voltag...
Page 4 SN74LVC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES220M – APRIL 1999 – REVISED JANUARY 2003 electrical characteristics over recommended operating free-air temperature range (unless otherw...
Page 5 SN74LVC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES220M – APRIL 1999 – REVISED JANUARY 2003 switching characteristics over recommended operating free-air temperature range, CL = 15 p F (u...
Page 6 SN74LVC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES220M – APRIL 1999 – REVISED JANUARY 2003 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL Open From Output TEST S1 Under Test GND t PLH/t P...
Page 7 SN74LVC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES220M – APRIL 1999 – REVISED JANUARY 2003 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL Open From Output TEST S1 Under Test GND t PLH/t P...
Page 8 MECHANICAL DATA MPDS018E – FEBRUARY 1996 – REVISED FEBRUARY 2002 DBV (R-PDSO-G5) PLASTIC SMALL-OUTLINE 0,15 NOM Gage Plane Seating Plane 0,05 MIN 0,10 NOTES: A. All linear dimensions are in millimeter...
Page 9 MECHANICAL DATA MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002 DCK (R-PDSO-G5) PLASTIC SMALL-OUTLINE PACKAGE 0,13 NOM Gage Plane Seating Plane NOTES: A. All linear dimensions are in millimeters. B. ...
Page 10 MECHANICAL DATA MXBG001B AUGUST 2001 – REVISED MAY 2002 YEA (R–XBGA–N5) DIE–SIZE BALL GRID ARRAY PIN A1 INDEX AREA 0,19 5X 0,15 0,05 AM BC 0,05 0,35 MAX 0,50 MAX SEATING PLANE NOTES: A. All linear dim...
Page 11 MECHANICAL DATA MXBG004A – JANUARY 2002 – REVISED APRIL 2002 YZA (R-XBGA-N5) DIE-SIZE BALL GRID ARRAY Pin A1 Index Area 0,19 5X 0,15 0,05 AM BC 0,05 CM 0,35 MAX 0,50 MAX Seating Plane NOTES: A. All li...
Page 12 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and servic...

Manual Details

Brand Texas Instruments
Pages 12
File Size 195.82 KB
Published May 28, 2026
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Frequently Asked Questions

When is data transferred from D to Q?

The data transfers to the Q output on the positive-going edge of the clock pulse, provided setup time requirements are met.

How does the device support partial-power-down applications?

It utilizes 'I' circuitry which disables the outputs and prevents damaging current backflow when power is removed.

What is the operating voltage range for this D-type flip-flop?

The device operates from 1.65V to 5.5V V, and inputs accept voltages up to 5.5V.

What are the safety ratings against static electricity?

It offers ESD Protection that exceeds JESD 22 – 2000-V Human-Body Model.