Texas Instruments CDC2510 Data Sheet

CDC2510

3.3-V PHASE-LOCK LOOP CLOCK DRIVER

SCAS597 – DECEMBER 1997

Phase-Lock Loop Clock Distribution for PW PACKAGE (TOP VIEW)

Synchronous DRAM Applications Distributes One Clock Input to One Bank of

AGND CLK

Ten Outputs

VCC AVCC

Single Output Enable Terminal Controls All

1Y0 VCC

Ten Outputs

External Feedback (FBIN) Pin Is Used to 1Y2 1Y8 Synchronize the Outputs to the Clock Input GND GND

On-Chip Series Damping Resistors GND GND 1Y3 1Y7

No External RC Network Required

Operates at 3.3-V VCC

VCC 1Y5

Packaged in Plastic 24-Pin Thin Shrink

Small-Outline Package

FBOUT FBIN

description The CDC2510 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The CDC2510 operates at 3.3-V VCC and provides integrated series-damping resistors that make it ideal for driving point-to-point loads. One bank of ten outputs provide ten low-skew, low-jitter copies of CLK. Output signal duty cycles are adjusted to 50 percent, independent of the duty cycle at CLK. All outputs can be enabled or disabled via a single output enable input. When the G input is high, the outputs switch in phase and frequency with CLK; when the G input is low, the outputs are disabled to the logic-low state. Unlike many products containing PLLs, the CDC2510 does not require external RC networks. The loop filter for the PLL is included on-chip, minimizing component count, board space, and cost. Because it is based on PLL circuitry, the CDC2510 requires a stabilization time to achieve phase lock of the feedback signal to the reference signal. This stabilization time is required, following power up and application of a fixed-frequency, fixed-phase signal at CLK, as well as following any changes to the PLL reference or feedback signals. The PLL can be bypassed for test purposes by strapping AVCC to ground. The CDC2510 is characterized for operation from 0°C to 70°C.

FUNCTION TABLE

INPUTS OUTPUTS 1Y

CLK FBOUT

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Copyright  1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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