National Semiconductor MM74HC04 Hex Inverter Data Sheet
Summary
The MM74HC04 is a high-performance, triple-buffered hex inverter using advanced CMOS technology for reliable signal inversion. This robust component offers low power consumption and ensures the capability to drive 10 LS-TTL loads while maintaining functional compatibility with standard 74LS logic. The accompanying manual provides detailed electrical specifications (absolute maximum ratings, DC/AC characteristics), covers operation across challenging temperature ranges, and lists multiple package options (SOIC, TSSOP, PDIP), making it ideal for electronic designers integrating reliable inverters into demanding circuit boards.
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74H 04 H ex In verter
September 1983 Revised January 2005
MM74HC04 Hex Inverter General Description Features The MM74HC04 inverters utilize advanced silicon-gate ■Typical propagation delay: 8 ns CMOS technology to achieve operating speeds similar to
■Fan out of 10 LS-TTL loads
LS-TTL gates with the low power consumption of standard
■Quiescent power consumption: 10 µW maximum at
CMOS integrated circuits.
room temperature
The MM74HC04 is a triple buffered inverter. It has high
■Low input current: 1 µA maximum
noise immunity and the ability to drive 10 LS-TTL loads. The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by inter- nal diode clamps to VCC and ground.
Ordering Code:
Package
Order Number Package Description
Number
MM74HC04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HC04M_NL Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HC04SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC04MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC04MTC_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
MM74HC04N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide MM74HC04N_NL N14A Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B.
Connection Diagram Logic Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP 1 of 6 Inverters
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© 2005 Fairchild Semiconductor Corporation DS005069 www.fairchildsemi.com
Page Summary Contents For National Semiconductor MM74HC04 Hex Inverter Data Sheet
Manual Details
| Brand | National |
|---|---|
| Pages | 7 |
| File Size | 81.01 KB |
| Published | June 17, 2026 |
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Frequently Asked Questions
What is the maximum operating temperature range?
The recommended operating temperature range is -40°C to +85°C.
How much current can the device sink from its outputs?
The output sink current (IOL) is specified as ≤ 20 μA at standard conditions.
Does the chip support compatibility with older logic families?
Yes, the 74HC logic family is functionally and pin-out compatible with the standard 74LS logic family.
What are the available package options for this inverter?
Available packages include SOIC (M14A), SOP (M14D), TSSOP (MTC14), and PDIP (N14A).
Are there limitations on Power Dissipation?
Power dissipation varies by package; for example, the "N" package has a derating of − 12 mW/°C from 65°C to 85°C.