National Semiconductor DS90CF563 DS90CF564 LVDS 18-Bit Color Flat Panel Display (FPD) Link — 65 MHz

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90C F563/D 90C F564 LV 18-B it olor Flat anel D isplay (FP Link

DS90CF563/DS90CF564 LVDS 18-Bit Color Flat Panel Display (FPD) Link— MHz General Description Features

The DS90CF563 transmitter converts bits of CMOS/TTL to MHz shift clk support

data into three LVDS (Low Voltage Differential Signaling) Up to Mbytes/s bandwidth data streams. phase-locked transmit clock is transmitted in Cable size is reduced to save cost parallel with the data streams over fourth LVDS link. Every m V swing LVDS devices for low EMI cycle of the transmit clock bits of input data are sampled

Low power CMOS design m W typ)

and transmitted. The DS90CF564 receiver converts the

Power-down mode saves power 0.25 m W)

LVDS data streams into bits of CMOS/TTL data. At

PLL requires no external components

transmit clock frequency of MHz, bits of RGB data

Low profile 48-lead TSSOP package

and bits of LCD timing and control data (FPLINE,

FPFRAME, DRDY) are transmitted at rate of Mbps per Falling edge data strobe LVDS data channel. Using MHz clock, the data through- Compatible with TIA/EIA-644 LVDS standard

put is Mbytes per second. These devices are offered Single pixel per clock XGA (1024 768) with falling edge data strobes for convenient interface with Supports VGA, SVGA, XGA and higher variety of graphics and LCD panel controllers.

1.3 Gbps throughput

This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.

Block Diagrams

DS90CF563 DS90CF564

DS012615-2 DS012615-1

Order Number DS90CF563MTD Order Number DS90CF564MTD See NS Package Number MTD48 See NS Package Number MTD48

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