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National Semiconductor DS90CF581 DS90CF582 LVDS 24-Bit Color Flat Panel Display (FPD) Link Data Sheet

Summary

DS90CF581/DS90CF582 are high-performance integrated solutions designed for transmitting and receiving 24-Bit Color Flat Panel Display (FPD) links using low-voltage differential signaling (LVDS). This chipset supports blazing fast data transfer up to 140 MB/sec, effectively mitigating EMI challenges found in traditional wide signal interfaces. The comprehensive manual provides detailed electrical specifications, operational parameters, and application guidance needed for seamless integration of high-bandwidth video signals. It is essential tooling for hardware engineers developing professional display systems requiring reliable, low-power connectivity.

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Page 1 Text Content

查询DS90CF581MTD供应商

April

-B it lo la is la (F in

DS90CF581/DS90CF582 LVDS 24-Bit Color Flat Panel Display (FPD) Link General Description Features

The DS90CF581 transmitter converts bits of CMOS/TTL Up to Megabyte/sec Bandwidth

data into four LVDS (Low Voltage Differential Signaling) Narrow bus reduces cable size data streams. phase-locked transmit clock is transmitted m V swing LVDS devices for low EMI in parallel with the data streams over fifth LVDS link. Every Low power CMOS design cycle of the transmit clock bits of input data are sampled

Power-down mode

and transmitted. The DS90CF582 receiver converts the

PLL requires no external components

LVDS data streams into bits of CMOS/TTL data. At

Low profile 56-lead TSSOP package

transmit clock frequency of MHz, bits of RGB data

Falling edge data strobe

and bits of LCD timing and control data (FPLINE,

FPFRAME, DRDY, CNTL) are transmitted at rate of Compatible with TIA/EIA-644 LVDS standard

Mbps per LVDS data channel. Using MHz clock, the data throughput is Megabytes per second. The chipset is an ideal means to solve EMI and cable size prob- lems associated with wide, high speed TTL interfaces.

Block Diagrams

DS90CF581 DS90CF582

TL/F/12486–1

Order Number DS90CF581MTD Order Number DS90CF582MTD See NS Package Number MTD56

See NS Package Number MTD56

Application

TL/F/12486–2

TRI-STATEÉ is registered trademark of National Semiconductor Corporation.

C1996 National Semiconductor Corporation TL/F/12486 RRD-B30M66/Printed in U. S. A.

Page Summary Contents For National Semiconductor DS90CF581 DS90CF582 LVDS 24-Bit Color Flat Panel Display (FPD) Link Data Sheet

Page 1 查询DS90CF581MTD供应商 April -B it lo la is la (F in DS90CF581/DS90CF582 LVDS 24-Bit Color Flat Panel Display (FPD) Link General Description Features The DS90CF581 transmitter converts bits of CMOS/TTL Up ...
Page 2 Connection Diagrams DS90CF581 DS90CF582 TL/F/12486–3 TL/F/12486–4 http://www.national.com
Page 3 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, Maximum Package Power Dissipation a25§C please contact the National Semiconductor Sales MTD56 (TSSOP) Package: D...
Page 4 Electrical Characteristics (Continued) Over recommended operating supply and temperature ranges unless otherwise specified Symbol Parameter Conditions Min Typ Max Units TRANSMITTER SUPPLY CURRENT ICCT...
Page 5 Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified (Continued) Symbol Parameter Min Typ Max Units RCOH Rx CLK OUT High Time(Figure 8) MHz 21....
Page 6 AC Timing Diagrams TL/F/12486–15 FIGURE 1. ‘‘WORST CASE’’ Test Pattern TL/F/12486–16 FIGURE 2. ‘‘16 GRAYSCALE’’ Test Pattern Note 1: The worst case test pattern produces maximum toggling of digital ci...
Page 7 AC Timing Diagrams (Continued) TL/F/12486–8 TL/F/12486–9 FIGURE 3. DS90CF581 (Transmitter) LVDS Output Load and Transition Timing TL/F/12486–10 TL/F/12486–11 FIGURE 4. DS90CF582 (Receiver) CMOS/TTL Ou...
Page 8 AC Timing Diagrams (Continued) TL/F/12486–12 FIGURE 7. DS90CF581 (Transmitter) Setup/Hold and High/Low Times TL/F/12486–13 FIGURE 8. DS90CF582 (Receiver) Setup/Hold and High/Low Times TL/F/12486–19 FI...
Page 9 AC Timing Diagrams (Continued) TL/F/12486–14 FIGURE 11. DS90CF581 (Transmitter) Phase Lock Loop Set Time TL/F/12486–21 FIGURE 12. DS90CF582 (Receiver) Phase Lock Loop Set Time http://www.national.com9
Page 10 AC Timing Diagrams (Continued) TL/F/12486–22 FIGURE 13. Seven Bits of LVDS in One Block Cycle TL/F/12486–23 FIGURE 14. Parallel TTL Data Inputs Mapped to LVDS Outputs (DS90CF581) http://www.national.c...
Page 11 DS90CF581 Pin DescriptionÐFPD Link Transmitter Pin Name I/O No. Description Tx IN TTL level input. This includes: Red, Green, Blue, and control lines (FPLINE, FPFRAME, DRDY, CNTL). (Also referred to a...
Page 12 -B it lo la is la (F in Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Molded Thin Shrink Small Outline Package, JEDEC Order Number DS90CF581MTD or DS90CF582MTD NS Package Num...

Manual Details

Brand National
Pages 12
File Size 213.91 KB
Published June 15, 2026
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Frequently Asked Questions

How fast is the data throughput possible with this link?

Using a 40 MHz clock, the data throughput can reach 140 Megabytes per second.

What standards does the DS90CF581/DS90CF582 comply with?

The device is compatible with the TIA/EIA-644 LVDS standard.

Can this chip be used in critical life support devices?

No, National's products are not authorized for use as critical components in life support systems without express written consent.

What are the roles of the transmitter and receiver chips?

The DS90CF581 transmits data to four LVDS links, while the DS90CF582 converts those LVDS streams back into CMOS/TTL data.