MAXIM MAX5894 14-Bit, 500 Msps, Interpolating and Modulating Dual DAC with CMOS Inputs

19-3631; Rev 2; 10/08

EVALUATION KIT AVAILABLE

14-Bit, 500Msps, Interpolating and Modulating

Dual DAC with CMOS Inputs

General Description Features

INTERPOLATING FILTERS

The MAX5894 programmable interpolating, modulating, 74d B ACLR at f OUT = 61.44MHz (Single-Carrier 500Msps, dual digital-to-analog converter (DAC) offers WCDMA) ODULATOR superior dynamic performance and is optimized for high-

Meets 3G UMTS, cdma2000®, GSM Spectral Masks

performance wideband, single-carrier transmit applica-

(f OUT = 122MHz) INTERPOLATING

tions. The device integrates a selectable 2x/4x/8x FILTERS

Noise Spectral Density = -154d BFS/Hz at

interpolating filter, a digital quadrature modulator, and

f OUT = 16MHz

dual 14-bit, high-speed DACs on a single integrated cir-

DATA SYNCH

cuit. At 30MHz output frequency and 500Msps update 91d Bc SFDR at Low-IF Frequency (10MHz) AND DEM UX rate, the in-band SFDR is 86d Bc while consuming 1.1W.

88d Bc SFDR at High-IF Frequency (50MHz)

The device also delivers 73d B ACLR for two-carrier

Low Power: 886m W (f CLK = 250MHz)

WCDMA at a 61.44MHz output frequency.

User Programmable

The selectable interpolating filters allow lower input data

Selectable 2x, 4x, or 8x Interpolating Filters

rates while taking advantage of the high DAC update

< 0.01d B Passband Ripple

rates. These linear-phase interpolation filters ease

> 99d B Stopband Rejection

reconstruction filter requirements and enhance the

Selectable Real or Complex Modulator Operation

passband dynamic performance. Individual offset and

Selectable Modulator LO Frequency: OFF, f IM/2

gain programmability allow the user to calibrate out local

or f IM/4

oscillator (LO) feedthrough and sideband suppression

Selectable Output Filter: Lowpass or Highpass

errors generated by analog quadrature modulators.

Channel Gain and Offset Adjustment

The MAX5894 features a f IM/4 digital image-reject mod-

EV Kit Available (Order the MAX5894 EV Kit)

ulator. This modulator generates a quadrature-modulat- ed IF signal that can be presented to an analog I/Q

Ordering Information

modulator to complete the upconversion process. A second digital modulation mode allows the signal to be

PART TEMP RANGE PIN-PACKAGE

frequency-translated with image pairs at f IM/2 or f IM/4.

MAX5894EGK-D -40°C to +85°C 68 QFN-EP*

The MAX5894 features a standard 1.8V CMOS, 3.3V tol-

MAX5894EGK+D -40°C to +85°C 68 QFN-EP*

erant data input bus for easy interface. A 3.3V SPI™ port

is provided for mode configuration. The programmable D = Dry pack. modes include the selection of 2x/4x/8x interpolating fil- *EP = Exposed pad. +Denotes a lead-free/Ro HS-compliant package.

ters, f IM/2, f IM/4 or no digital quadrature modulation with image rejection, channel gain and offset adjustment, and

Selector Guide

offset binary or two’s complement data interface. Pin-compatible 12- and 16-bit devices are also available.

RESOLUTION DAC UPDATE INPUT

Refer to the MAX5893 data sheet for the 12-bit version PART

(BITS) RATE (Msps) LOGIC

and the MAX5895 data sheet for the 16-bit version.

MAX5893 CMOS

Applications

MAX5894 CMOS

Base Stations: 3G UMTS, CDMA, and GSM MAX5895 CMOS Broadband Wireless Transmitters MAX5898 LVDS Broadband Cable Infrastructure

Simplified Diagram

Instrumentation and Automatic Test Equipment (ATE) Analog Quadrature Modulation Architectures

DATA OUTI DAC

PORT A

Pin Configuration appears at end of data sheet.

DATACLK

SPI is a trademark of Motorola, Inc. DAC

PORT B

cdma2000 is a registered trademark of Telecommunications Industry Association.

Maxim Integrated Products

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.