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Fairchild NC7WZ00 Data Handbook

Summary

The NC7WZ00 is a high-speed, space-saving dual 2-Input NAND Gate designed for sophisticated digital circuit design. Featuring an advanced CMOS structure and US8 surface mount package, this logic gate delivers ultra-high operational speed (t < 2.4ns) and reliable performance across a broad 1.65V to 5.5V operating range. This comprehensive manual provides detailed technical specifications, absolute maximum ratings, electrical characteristics, and recommended conditions, making it an essential resource for electronics engineers building advanced embedded systems or high-performance digital logic that requires overvoltage tolerance and minimal power dissipation.

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7W 00 — iny L ic al 2-In t N ate

March 2008

NC7WZ00 Tiny Logic® UHS Dual 2-Input NAND Gate Features General Description Space saving US8 surface mount package The NC7WZ00 is a dual 2-Input NAND Gate from

Micro Pak™ leadless package Fairchild's Ultra High Speed Series of Tiny Logic. The device is fabricated with advanced CMOS technology to

Ultra High Speed; t PD 2.4ns typ. into 50p F at 5V VCC

achieve ultra high speed with high output drive while

High Output Drive; ±24m A at 3V VCC

maintaining low static power dissipation over a broad

Broad VCC Operating Range; 1.65V–5.5V

VCC operating range. The device is specified to operate

Matches the performance of LCX when operated at over the 1.65V to 5.5V VCC operating range. The inputs 3.3V VCC and output are high impedance when VCC is 0V. Inputs

Power down high impedance inputs/output tolerate voltages up to 7V independent of VCC operating voltage.

Overvoltage tolerant inputs facilitate 5V to 3V translation Proprietary noise/EMI reduction circuitry implemented

Ordering Information Order Package Product Code Number Number Top Mark Package Description Supplied As NC7WZ00K8X MAB08A WZ00 8-Lead US8, JEDEC MO-187, 3k Units on Tape and

Variation CA 3.1mm Wide Reel

NC7WZ00L8X MAC08A N6 8-Lead Micro Pak, 1.6 mm Wide 5k Units on Tape and

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

©2 000 Fairchild Semiconductor Corporation www.fairchildsemi.com NC 7WZ00 Rev. 1.11.0

Page Summary Contents For Fairchild NC7WZ00 Data Handbook

Page 1 7W 00 — iny L ic al 2-In t N ate March 2008 NC7WZ00 Tiny Logic® UHS Dual 2-Input NAND Gate Features General Description Space saving US8 surface mount package The NC7WZ00 is a dual 2-Input NAND Gate f...
Page 2 7W 00 — iny L ic al 2-In t N ate Connection Diagram Logic Symbol IEEE/IEC (Top View) Pin One Orientation Diagram Function Table Y = AB Inputs Output AAA represents Product Code Top Mark – see ordering...
Page 3 7W 00 — iny L ic al 2-In t N ate Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operat...
Page 4 7W 00 — iny L ic al 2-In t N ate DC Electrical Characteristics TA = –40°C TA = 25°C to +85°C Symbol Parameter VCC (V) Conditions Typ. Max. Min. Max. Units Min. VIH HIGH Level 1.65–1.95 0.75 x VCC 0.75...
Page 5 7W 00 — iny L ic al 2-In t N ate AC Electrical Characteristics TA = –40°C TA = +25°C to +85°C Figure Symbol Parameter VCC (V) Conditions Typ. Max. Min. Max. Units Number Min. t PLH, t PHL Propagation ...
Page 6 7W 00 — iny L ic al 2-In t N ate Tape and Reel Specifications Tape Format for US8 Package Designator Tape Section Number of Cavities Cavity Status Cover Tape Status K8X Leader (Start End) 125 (typ.) E...
Page 7 7W 00 — iny L ic al 2-In t N ate Tape and Reel Specifications (Continued) Reel Dimensions inches (millimeters) Tape Size W1 W2 W3 8mm 7.0 0.059 0.512 0.795 2.165 0.331 +0.059/–0.000 0.567 W1 +0.078/–0...
Page 8 7W 00 — iny L ic al 2-In t N ate Physical Dimensions 0.30 TYP 0.5 TYP ALL LEAD TIPS PIN #1 IDENT. ALL LEAD TIPS DETAIL 0.90 MAX 0.50TYP 0.4 TYP GAGE PLANE A. CONFORMS TO JEDEC REGISTRATION MO-187 SEAT...
Page 9 7W 00 — iny L ic al 2-In t N ate Physical Dimensions (Continued) Figure 5. 8-Lead Micro Pak, 1.6 mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawi...
Page 10 7W 00 — iny L ic al 2-In t N ate TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not...

Manual Details

Brand Fairchild
Pages 10
File Size 651.29 KB
Published June 05, 2026
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Frequently Asked Questions

What is the typical propagation delay for this NAND gate?

The typical propagation delay (t) is 2.4ns into 50pF at 5V V PD CC.

What is the recommended operating voltage range?

The device should operate within a Supply Voltage range of 1.65V to 5.5V, and input/output voltages from 0V to 5.5V.

Are unused inputs allowed to float when powering down?

No; all unused inputs must be held either HIGH or LOW. They may not float.

What is the maximum safe operating temperature range?

The recommended operating temperature range (T Operating) is from –40°C to +85°C.