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Fairchild FST3125 4-Bit Bus Switch Data Handbook

Summary

This highly reliable, CMOS TTL bus switch provides four high-speed electrical connections facilitating robust data transfer between two ports (A and B). Designed for optimal signal integrity, it features minimal propagation delay and zero bounce in flow-through mode. The documentation details comprehensive technical specifications, including various package types (SOIC, QSOP, TSSOP), electrical characteristics, operating limits, and pin layouts, making it essential for electronics engineers designing precision digital circuits requiring dependable bus switching.

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FST3125 — 4-B it B us Sw itch

March 2008

FST3125 — 4-Bit Bus Switch Features Description

4Ω Switch Connection between Two Ports Fairchild switch FST3125 provides four high-speed CMOS TTL-compatible bus switches. The low on

Minimal Propagation Delay through the Switch

resistance of the switch allows inputs to be connected to outputs without adding propagation delay or

Low ICC

generating additional ground bounce noise.

Zero Bounce in Flow-through Mode

The device is organized as four one1-bit switches with

Control Inputs Compatible with TTL Level

separate /OE inputs. When /OE is LOW, the switch is ON and port A is connected to port B. When /OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports.

Ordering Information

Operating

Part Number Temperature Package Packing

Method

Range

FST3125M -40 to 85°C 14-Lead, Small Outline Integrated Circuit (SOIC) 0.150 inch

Narrow Tube

FST3125MX -40 to 85°C 14-Lead, Small Outline Integrated Circuit (SOIC) 0.150 inch

Narrow Tape and Reel

FST3125QSC -40 to 85°C 16-Lead, Quarter Size Outline Package (QSOP) MO-137

0.150 inch Wide Tube

FST3125QSCX -40 to 85°C 16-Lead, Quarter Size Outline Package (QSOP) MO-137

0.150 inch Wide Tape and Reel

FST3125MTC -40 to 85°C 14-Lead, Thin Shrink Small Outline Package (TSSOP)

MO-153, 4mm Wide Tube

FST3125MTCX -40 to 85°C 14-Lead, Thin Shrink Small Outline Package (TSSOP)

MO-153, 4mm Wide Tape and Reel

All packages are lead free per JEDEC: J-STD-020B standard. The Fairchild switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product.

Figure 1. Logic Diagram

© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com FST3125 • Rev. 1.0.3

Page Summary Contents For Fairchild FST3125 4-Bit Bus Switch Data Handbook

Page 1 FST3125 — 4-B it B us Sw itch March 2008 FST3125 — 4-Bit Bus Switch Features Description 4Ω Switch Connection between Two Ports Fairchild switch FST3125 provides four high-speed CMOS TTL-compatible bu...
Page 2 FST3125 — 4-B it B us Sw itch Pin Configurations NC VCC /OE1 VCC /OE1 /OE4 1A /OE4 /OE2 4B /OE2 /OE3 2A /OE3 GND 3B GND NC Figure 2. SOIC and TSSOP Pin Assignments Figure 3. QSOP Pin Assignments Pin D...
Page 3 FST3125 — 4-B it B us Sw itch Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating...
Page 4 FST3125 — 4-B it B us Sw itch DC Electrical Characteristics Typical values are at VCC = 5.0V and TA = 25°C. TA=-40 to +85°C Symbol Parameter Conditions VCC (V) Units Min. Typ. Max. VIK Clamp Diode Vol...
Page 5 FST3125 — 4-B it B us Sw itch AC Loadings and Waveforms Notes: Input driven by 50Ω source terminated in 50Ω. CL includes load and stray capacitance. Input PRR = 1.0MHz, tw = 500ns. Figure 4. AC Test C...
Page 6 FST3125 — 4-B it B us Sw itch Physical Dimensions PIN ONE INDICATOR 1.27 0.51 0.35 LAND PATTERN RECOMMENDATION 0.25 BC 1.75 MAX SEE DETAIL A NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS ...
Page 7 FST3125 — 4-B it B us Sw itch Physical Dimensions LAND PATTERN TOP VIEW RECOMMENDATION END VIEW SIDE VIEW DETAIL A Figure 7. 16-Lead, Quarter-Size Outline Package (QSOP), MO-1370.150-inch Wide Package...
Page 8 FST3125 — 4-B it B us Sw itch Physical Dimensions 0.43 TYP 0.65 12.00°TOP & BOTTOM R0.09 min A. CONFORMS TO JEDEC REGISTRATION MO-153, R0.09min VARIATION AB, REF NOTE 6 1.00 B. DIMENSIONS ARE IN M...
Page 9 FST3125 — 4-B it B us Sw itch © 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com FST3125 • Rev. 1.0.3 9

Manual Details

Brand Fairchild
Pages 9
File Size 440.57 KB
Published June 20, 2026
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Frequently Asked Questions

How does this bus switch operate?

The switch connects Port A to Port B when /OE is LOW, and enters a high-impedance state when /OE is HIGH.

What are the recommended operating voltage ranges?

VCC/VEE should be between 4.0 V and 5.5 V, with input/output voltages also restricted to 0 V to 5.5 V.

Does it minimize electrical noise and delays?

Yes, it offers minimal propagation delay and low ICC, which helps in reducing ground bounce noise.

What are the available package options for this chip?

It is available in packaging types including SOIC, QSOP, TSSOP, and their Tape and Reel variations.