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Fairchild FDMF6820A User's Manual

Summary

Discover the FDMF6820A, an ultra-compact, high-efficiency DrMOS power stage solution for demanding DC-DC conversion needs. This integrated MOSFET and driver provides superior performance in a small 6x6mm PQFN package, ideal for applications requiring high current handling (up to 60A) and minimal ringing, such as gaming motherboards, compact servers, and workstations. The technical manual provides comprehensive details, including detailed application circuits, pin configurations, and advanced control features like thermal warning flags, making it essential documentation for engineers designing professional-grade point-of-load regulators and power supply systems.

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Page 1 Text Content

6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le

April 2012

FDMF6820A — Extra-Small, High-Performance, High-Frequency Dr MOS Module Benefits

Description

 Ultra-Compact 6x6mm PQFN, 72% Space-Saving The XS™ Dr MOS family is Fairchild’s next-generation, Compared to Conventional Discrete Solutions fully optimized, ultra-compact, integrated MOSFET plus

driver power stage solution for high-current, high-

 Fully Optimized System Efficiency

frequency, synchronous buck DC-DC applications. The

 Clean Switching Waveforms with Minimal Ringing FDMF6820A integrates a driver IC, two power

MOSFETs, and a bootstrap Schottky diode into a

 High-Current Handling

thermally enhanced, ultra-compact 6x6mm package.

Features

With an integrated approach, the complete switching power stage is optimized with regard to driver and

 Over 93% Peak-Efficiency

MOSFET dynamic performance, system inductance,  High-Current Handling: 60A and power MOSFET RDS(ON). XS™ Dr MOS uses Fairchild's high-performance Power Trench® MOSFET

 High-Performance PQFN Copper-Clip Package

technology, which dramatically reduces switch ringing,  3-State 3.3V PWM Input Driver eliminating the need for snubber circuit in most buck converter applications.

 Skip-Mode SMOD# (Low-Side Gate Turn Off) Input

A driver IC with reduced dead times and propagation

 Thermal Warning Flag for Over-Temperature

delays further enhances the performance. A thermal

Condition

warning function warns of a potential over-temperature  Driver Output Disable Function (DISB# Pin) situation. The FDMF6820A also incorporates a Skip Mode (SMOD#) for improved light-load efficiency. The

 Internal Pull-Up and Pull-Down for SMOD# and

FDMF6820A also provides a 3-state 3.3V PWM input for

DISB# Inputs, Respectively

compatibility with a wide range of PWM controllers.

 Fairchild Power Trench® Technology MOSFETs for

Applications

Clean Voltage Waveforms and Reduced Ringing  Fairchild Sync FET™ (Integrated Schottky Diode)  High-Performance Gaming Motherboards Technology in Low-Side MOSFET

 Compact Blade Servers, V-Core and Non-V-Core

 Integrated Bootstrap Schottky Diode DC-DC Converters  Adaptive Gate Drive Timing for Shoot-Through  Desktop Computers, V-Core and Non-V-Core Protection DC-DC Converters  Under-Voltage Lockout (UVLO)  Workstations  Optimized for Switching Frequencies up to 1MHz  High-Current DC-DC Point-of-Load Converters  Low-Profile SMD Package  Networking and Telecom Microprocessor Voltage

Regulators

 Fairchild Green Packaging and Ro HS Compliance

 Small Form-Factor Voltage Regulator Modules

 Based on the Intel® 4.0 Dr MOS Standard

Ordering Information

Part Number Current Rating Package Top Mark FDMF6820A 60A 40-Lead, Clipbond PQFN Dr MOS, 6.0mm x 6.0mm Package FDMF6820A

© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMF6820A • Rev. 1.0.2

Page Summary Contents For Fairchild FDMF6820A User's Manual

Page 1 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le April 2012 FDMF6820A — Extra-Small, High-Performance, High-Frequency Dr MOS Module Benefits Description  Ultra-Compact 6x6mm PQFN, ...
Page 2 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Typical Application Circuit CVDRV CVIN VDRV VCIN VIN DISB# DISB# RBOOT CBOOT PWM Input PWM FDMF6820A PHASE SMOD# VSWH VOUT Open-Drai...
Page 3 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Pin Configuration Figure 3. Bottom View Figure 4. Top View Pin Definitions Pin # Name Description When SMOD#=HIGH, the low-side driv...
Page 4 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Absolute Maximum Ratings Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be op...
Page 5 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Electrical Characteristics Typical values are VIN = 12V, VCIN = 5V, VDRV = 5V, and TA = TJ = +25°C unless otherwise noted. Symbol Pa...
Page 6 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Electrical Characteristics Typical values are VIN = 12V, VCIN = 5V, VDRV = 5V, and TA = TJ = +25°C unless otherwise noted. Symbol Pa...
Page 7 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le V IH_PWM IL_PWM GH to VSWH 10% D_TIMEOUT t 250ns Timeout) t PD PHGLL PD_PLGHL t D_DEADOFF t D_DEADON Figure 5. PWM Timing Diagram © ...
Page 8 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le rm li ze le rm li ze le le tp rr t, (A Typical Performance Characteristics Test Conditions: VIN=12V, VOUT=1V, VCIN=5V, VDRV=5V, LOUT...
Page 9 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Typical Performance Characteristics ri ve IC ly lt (V rm li ze le IN ri ve ly rr t, IN (m Test Conditions: VIN=12V, VOUT=1V, VCIN=5V...
Page 10 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Typical Performance Characteristics IS re ld lt IS (V re ld lt (V re ld lt (V Test Conditions: VCIN=5V, VDRV=5V, TA=25°C, and natura...
Page 11 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Typical Performance Characteristics IS ll -D rr t, (u Test Conditions: VCIN=5V, VDRV=5V, TA=25°C, and natural convection cooling, un...
Page 12 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Functional Description The FDMF6820A is a driver-plus-FET module optimized Three-State PWM Input for the synchronous buck converter ...
Page 13 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le HIGH, Q2 begins to turn off after a propagation delay Adaptive Gate Drive Circuit (t PD_PHGLL). Once the GL pin is discharged below ...
Page 14 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le When the SMOD# pin is pulled HIGH, the synchronous Skip Mode (SMOD#) buck converter works in Synchronous Mode. This mode The Skip Mo...
Page 15 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Application Information VCIN Filter Supply Capacitor Selection The VDRV pin provides power to the gate drive of the For the supply i...
Page 16 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le PCB Layout Guidelines Figure 31 and Figure 32 provide an example of a proper noise issues due to ground bounce or high positive layo...
Page 17 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Figure 31. PCB Layout Example (Top View) Figure 32. PCB Layout Example (Bottom View) © 2011 Fairchild Semiconductor Corporation www....
Page 18 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le Physical Dimensions PIN#1 0.10 INDICATOR TOP VIEW 0.60 SEE 0.35 DETAIL 'A' 0.50 TYP 2.10 2.10 LAND PATTERN RECOMMENDATION FRONT VIEW...
Page 19 6820A xtra-S all, H ig -P erfo rm an ce, H ig -F req en cy D r M le © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMF6820A • Rev. 1.0.2 19

Manual Details

Brand Fairchild
Pages 19
File Size 1.36 MB
Published June 03, 2026
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Frequently Asked Questions

What is the maximum current rating of the module?

The FDMF6820A has a high-current handling rating of 60A DS(ON).

Is snubber circuitry needed for most designs using this DrMOS?

No, the PQFN Copper-Clip Package technology reduces switch ringing, eliminating the need for snubber circuits in most buck converter applications.

How does it improve light-load efficiency?

It includes a Skip Mode (SMOD#) and Driver Output Disable Function (DISB# Pin) for improved light-load efficiency.

What recommended components are needed near specific pins?

A minimum 1uF ceramic capacitor is recommended for the VCIN pin, and a bootstrap capacitor should connect from BOOT to PHASE.