Fairchild FDH50N50 FDFA50N50 Data Handbook

查询FDA50N50供应商 FD 50N 50 / FD 50N 50 500V N -C hannel M SFET

Uni FETTM

FDH50N50 / FDA50N50 500V N-Channel MOSFET

Features Description 48A, 500V, RDS(on) = 0.105Ω @VGS = 10 V These N-Channel enhancement mode power field effect transis-

tors are produced using Fairchild’s proprietary, planar stripe,

Low gate charge ( typical 105 n C)

DMOS technology.

Low Crss ( typical 45 p F)

Fast switching This advanced technology has been especially tailored to mini- mize on-state resistance, provide superior switching perfor-

100% avalanche tested

mance, and withstand high energy pulse in the avalanche and

Improved dv/dt capability

commutation mode. These devices are well suited for high effi- cient switched mode power supplies and active power factor correction.

TO-247 TO-3P FDH Series FDA Series

Absolute Maximum Ratings Symbol Parameter FDH50N50/FDA50N50 Unit VDSS Drain-Source Voltage

ID Drain Current - Continuous (TC = 25°C)

- Continuous (TC = 100°C) 30.8

IDM Drain Current - Pulsed (Note 1)

VGSS Gate-Source voltage ±20

EAS Single Pulsed Avalanche Energy (Note 2) m J

IAR Avalanche Current (Note 1)

EAR Repetitive Avalanche Energy (Note 1) 62.5 m J

dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns

PD Power Dissipation (TC = 25°C)

- Derate above 25°C W/°C

TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C

TL Maximum Lead Temperature for Soldering Purpose,

1/8” from Case for 5 Seconds

Thermal Characteristics Symbol Parameter Min. Max. Unit RθJC Thermal Resistance, Junction-to-Case 0.2 °C/W

RθCS Thermal Resistance, Case-to-Sink 0.24 °C/W

RθJA Thermal Resistance, Junction-to-Ambient °C/W

©2004 Fairchild Semiconductor Corporation www.fairchildsemi.com FDH50N50 / FDA50N50 Rev. A