Fairchild 74LVX244 Low Voltage Octal Buffer Line Driver with 3-STATE Outputs Data Sheet

74LV 244 L ltag e O ctal B ffer/L in e D river w ith 3-S TA tp ts

February 1993 Revised April 2005

74LVX244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The LVX244 is an octal non-inverting buffer and line driver Input voltage translation from 5V to 3V designed to be employed as a memory address driver, Ideal for low power/low noise 3.3V applications clock driver and bus oriented transmitter or receiver which

■Guaranteed simultaneous switching noise level and

provides improved PC board density. The inputs tolerate up

dynamic threshold performance

to 7V allowing interface of 5V systems to 3V systems.

Ordering Code: Order Number Package Number Package Description 74LVX244M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LVX244SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B.

Logic Symbol Pin Descriptions

IEEE/IEC Pin Names Description

OE1, OE2 3-STATE Output Enable Inputs

I0–I7 Inputs

O0–O7 Outputs

Truth Tables Inputs Outputs

OE1 In (Pins 12, 14, 16, 18)

Connection Diagram

Inputs Outputs

OE2 In (Pins 3, 5, 7, 9)

H HIGH Voltage Level L LOW Voltage Level

X Immaterial Z High Impedance

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