Fairchild 74F148 Data Handbook

74F 148 8-L in e to 3-L in e P rio rity E co er

April 1988 Revised July 1999

74F148 8-Line to 3-Line Priority Encoder General Description Features The F148 provides three bits of binary coded output repre- Encodes eight data lines in priority senting the position of the highest order active input, along

Provides 3-bit binary priority code

with an output indicating the presence of any active input. It

Input enable capability

is easily expanded via input and output enables to provide

Signals when data is present on any input

priority encoding over many bits.

Cascadable for priority encoding of n bits

Ordering Code: Order Number Package Number Package Description 74F148SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F148SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F148PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols Connection Diagram

IEEE/IEC

Truth Table

Inputs Outputs

EI I0 I1 I2 I3 I4 I5 I6 I7 GS A0 A1 A2 EO

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

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