ANALOG DEVICES ADN2806 User's Guide
Summary
The ADN2806 is a specialized Clock and Data Recovery IC for handling 622 Mbps NRZ data, designed to exceed strict SONET jitter requirements. This chip provides automatic, reference clock-free locking for high-speed optical receivers. The manual offers comprehensive technical support covering the device's theory of operation, detailed jitter specifications, functional block diagrams, electrical characteristics (including power and thermal details), and critical PCB design guidelines. It is essential reading for engineers integrating highly reliable, low-power BPON ONT and WDM transponder systems.
Page 1 Text Content
622 Mbps Clock and Data Recovery IC
Data Sheet ADN2806 FEATURES GENERAL DESCRIPTION Exceeds SONET requirements for jitter transfer/
The ADN2806 provides the receiver functions for clock and
generation/tolerance
data recovery, and data retiming for 622 Mbps NRZ data. The
Patented clock recovery architecture
ADN2806 automatically locks to 622 Mbps data without the
No reference clock required
need for an external reference clock or programming. All
Loss-of-lock indicator
SONET jitter requirements are met, including jitter transfer,
I2C® interface to access optional features
jitter generation, and jitter tolerance. All specifications are
Single-supply operation: 3.3 V
quoted for −40°C to +85°C ambient temperature, unless
Low power: 359 m W typical
otherwise noted.
5 mm × 5 mm, 32-lead LFCSP, Pb free
This device, together with a PIN diode, TIA preamplifier, and a
APPLICATIONS
lim amp can implement a highly integrated, low cost, low power
BPON ONT
fiber optic receiver.
SONET OC-12
WDM transponders The ADN2806 is available in a compact 5 mm × 5 mm, Regenerators/repeaters 32-lead LFCSP.
Test equipment Broadband cross-connects and routers
FUNCTIONAL BLOCK DIAGRAM REFCLKP/REFCLKN
(OPTIONAL) LOL CF2 VCC VEECF1
FREQUENCY LOOP DETECT FILTER
PHASE LOOP
NIN BUFFER VCOPHASE
SHIFTER DETECT FILTER
DATA RE-TIMING
ADN2806
DATAOUTP/ CLKOUTP/ DATAOUTN CLKOUTN
Figure 1.
Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2006–2012 Analog Devices, Inc. All rights reserved.
Page Summary Contents For ANALOG DEVICES ADN2806 User's Guide
Manual Details
| Brand | Analog Devices |
|---|---|
| Pages | 20 |
| File Size | 313.56 KB |
| Published | July 15, 2026 |
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Frequently Asked Questions
Does the ADN2806 require an external reference clock?
No, it uses a patented clock recovery architecture and automatically locks to 622 Mbps data without needing an external reference clock or programming.
What is the operating supply voltage and temperature range?
It operates on single-supply operation at 3.3 V from -40°C to +85°C ambient temperature.
What are some typical applications for this IC?
It can implement a highly integrated, low cost, low power BPON ONT fiber optic receiver, and is used in WDM transponders.
What form factor and package type is the ADN2806 available in?
It comes in a compact 5 mm × 5 mm, 32-lead LFCSP package.
Can this chip handle standard SONET jitter requirements?
Yes, it meets all SONET jitter requirements, including monitoring jitter transfer and jitter tolerance.