Texas Instruments THS1050 Data Sheet / Manual
Summary
This high-performance 10-bit Analog-to-Digital Converter delivers up to 50 MSPS at a low noise level. Ideal for demanding signal processing tasks in medical imaging, telecommunications (cable modem receivers), and advanced scientific equipment. Detailed documentation provides full specifications on its differential architecture, sample-and-hold capabilities, and robust operation across temperature ranges, ensuring reliable data acquisition without missing codes. Designed for engineers requiring exceptional Signal-to-Noise Ratio (SNR) and high bandwidth in critical professional applications.
Page 1 Text Content
查询THS1050供应商 THS1050
10-BIT 50 MSPS IF SAMPLING COMMUNICATIONS
ANALOG-TO-DIGITAL CONVERTER
SLAS278 – APRIL 2000
features applications 50 MSPS Maximum Sample Rate Wireless Local Loop 10-Bit Resolution Wireless Internet Access No Missing Codes Cable Modem Receivers On-Chip Sample and Hold Medical Ultrasound 73 d B Spurious Free Dynamic Range at Magnetic Resonant Imaging fin = 15.5 MHz
48 PHP PACKAGE
5 V Analog and Digital Supply
(TOP VIEW)
3 V and 5 V CMOS Compatible Digital Output 9.7 Bit ENOB at f IN = 31 MHz 60 d B SNR at f IN = 31 MHz 82 MHz Bandwidth
AVSS NC
Internal or External Reference
AVDD NC
Buffered 900 Ω Differential Analog Input VIN+ D0
VIN– D1
description
AVDD D2 VREFOUT– D3
The THS1050 is a high speed low noise 10-bit
VREFIN– D4
CMOS pipelined analog-to-digital converter. A
VREFIN+ D5
differential sample and hold minimizes even order
VREFOUT+ D6
harmonics and allows for a high degree of
VBG D7
common mode rejection at the analog input. A
AVSS D8
buffered analog input enables operation with a
AVDD D9
constant analog input impedance, and prevents
transient voltage spikes from feeding backward to
the analog input source. Full temperature DNL performance allows for industrial application with the assurance of no missing codes. The typical integral nonlinearity (INL) for the THS1050 is less than one LSB. The superior INL curve of the THS1050 results in SFDR performance that is exceptional for a 10-bit analog-to-digital converter. The THS1050 can operate with either internal or external references. Internal reference usage selection is accomplished simply by externally connecting reference output terminals to reference input terminals.
AVAILABLE OPTIONS
PACKAGE
TA 48-TQFP
(PHP)
–40°C to 85°C THS1050I 0°C to 70°C THS1050C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright 2000, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page Summary Contents For Texas Instruments THS1050 Data Sheet / Manual
Manual Details
| Brand | Texas Instruments |
|---|---|
| Pages | 20 |
| File Size | 396.32 KB |
| Published | June 02, 2026 |
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Frequently Asked Questions
What are the THS1050's typical linearity metrics?
The typical integral nonlinearity (INL) is less than one LSB. This results in superior SFDR performance for a 10-bit ADC.
How can I operate the converter using an external reference voltage?
You can utilize external references by connecting to terminals V7 (External reference input low) and V8 (External reference input high).
What requirements must the differential analog inputs meet?
The differential analog inputs are terminated with a 900-W resistor, followed by a unity gain buffer before reaching the S/H stage.