Texas Instruments SN54HC164, SN74HC164 8-Bit Parallel-Out Serial Shift Registers Data Manual

SN54HC164, SN74HC164

8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS

SCLS115B – DECEMBER 1982 – REVISED MAY 1997

AND-Gated (Enable/Disable) Serial Inputs SN54HC164 J OR W PACKAGE SN74HC164 D OR N PACKAGE

Fully Buffered Clock and Serial Inputs

(TOP VIEW)

Direct Clear Package Options Include Plastic VCC Small-Outline (D) and Ceramic Flat (W) QH Packages, Ceramic Chip Carriers (FK), and QA QG Standard Plastic (N) and Ceramic (J) QB QF 300-mil DIPs QC QE

QD CLR

description

GND CLK

These 8-bit shift registers feature AND-gated serial inputs and an asynchronous clear (CLR)

SN54HC164 FK PACKAGE

input. The gated serial (A and B) inputs permit (TOP VIEW) complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the

QA QG

other input, which then determines the state of the

NC NC

first flip-flop. Data at the serial inputs can be

QB QF

changed while CLK is high or low, provided the

NC NC

minimum setup time requirements are met.

QC QE

Clocking occurs on the low-to-high-level transition of CLK. The SN54HC164 is characterized for operation over the full military temperature range of –55°C

NC – No internal connection

to 125°C. The SN74HC164 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE INPUTS OUTPUTS

CLR CLK QA QB QH

QA0 QB0 QH0 QAn QGn QAn QGn QAn QGn

QA0, QB0, QH0 = the level of QA, QB, or QH, respectively, before the indicated steady-state input conditions were established QAn, QGn = the level of QA or QG before the most recent ↑ transition of CLK: indicates a 1-bit shift

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Copyright  1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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