Motorola Freescale Semiconductor MCF5407PB D Rev. 3.3, 2 2003 MCF5407 Integrated ColdFire Microprocessor Product Brief

Q: What is the primary performance rating of the MCF5407?

It delivers 316 Dhrystone MIPS at 220 MHz, or 233 Dhrystone MIPS at 162 MHz.

Q: Does the processor support legacy architectures?

Yes, it provides a compatible path for 68K and ColdFire customers, allowing code translation from 68K assembly to ColdFire.

Q: What cache architecture does the MCF5407 utilize?

It uses a Harvard memory architecture system featuring a 16-Kbyte instruction cache and an 8-Kbyte data cache.

Q: What are the critical usage limitations of this microprocessor?

The product is not authorized or designed for use in life-support applications or surgical implants into the human body.

Summary

The MCF5407 is a high-performance, integrated ColdFire V4 microprocessor optimized for demanding embedded control applications. This product brief provides an in-depth overview of its advanced system architecture, including Harvard memory caching, MAC units, DMA controllers, and DRAM integration. It offers designers a powerful, cost-effective upgrade path for current 68K systems while delivering industry-leading performance (up to 233 MIPS). Ideal for engineers needing compact, powerful processing solutions in embedded markets.

MCF5407 Integrated ColdFire® Microprocessor Product Brief
- 1.1 Features
  - Figure1. MCF5407 Block Diagram
- 1.2 MCF5407 Features
  - 1.2.1 Process
- 1.3 ColdFire Module Description
  - 1.3.1 ColdFire Core
    
    1.3.1.1 Instruction Fetch Pipeline (IFP)
    
    1.3.1.2 Operand Execution Pipeline (OEP)
    
    1.3.1.3 MAC Module
    
    1.3.1.4 Integer Divide Module
  - 1.3.2 Harvard Architecture
    
    1.3.2.1 16-Kbyte Instruction Cache/8-Kbyte Data Cache
    
    1.3.2.2 Internal 2-Kbyte SRAMs
  - 1.3.3 DRAM Controller
  - 1.3.4 DMA Controller
  - 1.3.5 UART Modules
    
    Figure2. UART Module Block Diagram
  - 1.3.6 Timer Module
  - 1.3.7 I2C Module
  - 1.3.8 System Interface
    
    1.3.8.1 External Bus Interface
    
    1.3.8.2 Chip Selects
    
    1.3.8.3 16-Bit Parallel Port Interface
    
    1.3.8.4 Interrupt Controller
    
    1.3.8.5 JTAG
  - 1.3.9 System Debug Interface
  - 1.3.10 PLL Module
    
    Figure3. PLL Module
- 1.4 Programming Model, Addressing Modes, and Instruction Set
  - 1.4.1 Programming Model
    
    Figure4. ColdFire MCF5407 Programming Model
  - 1.4.2 User Registers
    
    Table1. User-Level Registers
  - 1.4.3 Supervisor Registers
    
    Table2. Supervisor-Level Registers
  - 1.4.4 Addressing Modes
    
    Table3. MCF5407 Data Formats
    
    Table4. Notational Conventions
    
    1.4.4.1 Addressing Capability Summary
  - 1.4.5 Instruction Set
    
    Table8. ColdFire ISA B Extension Summary
    
    Table9. Supervisor-Level Instruction Set Summary
    
    Table10. User-Level Instruction Set Summary
- 1.5 General Device Information
  - Table11. MCF5407 Package/Frequency
  - Table12. Documentation

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re sc le ic to r, Freescale Semiconductor, Inc.

Advance Information

MCF5407PB/D Rev. 3.3, 2/2003

MCF5407 Integrated Cold Fire® Microprocessor Product Brief

This document is an overview of the MCF5407 Cold Fire processor, focusing on feature enhancements over the MCF5307. It includes general descriptions of features and of the various modules incorporated in the MCF5407. It describes the V4 programming model as it is implemented in the MCF5407.

1.1 Features The MCF5407 integrated microprocessor combines a Version 4 Cold Fire processor core with the following components, as shown in Figure 1: Harvard architecture memory system with 16-Kbyte instruction cache and 8-Kbyte data cache Two, 2-Kbyte on-chip SRAMs Integer/fractional multiply-accumulate (MAC) unit Divide unit System debug interface DRAM controller for synchronous and asynchronous DRAM Four-channel DMA controller Two general-purpose timers Two UARTs, one that supports synchronous operations I2C™ interface Parallel I/O interface System integration module (SIM) Designed for embedded control applications, the MCF5407 delivers 316 Dhrystone MIPS at 220 MHz or 233 Dhrystone MIPS at 162 MHz.

For More Information On This Product, Go to: www.freescale.com

Page Summary Contents For Motorola Freescale Semiconductor MCF5407PB D Rev. 3.3, 2 2003 MCF5407 Integrated ColdFire Microprocessor Product Brief

Page 1 re sc le ic to r, Freescale Semiconductor, Inc. Advance Information MCF5407PB/D Rev. 3.3, 2/2003 MCF5407 Integrated Cold Fire® Microprocessor Product Brief This document is an overview of the MCF5407 ...

Page 2 re sc le ic to r, Freescale Semiconductor, Inc. Features V4 COLDFIRE PROCESSOR COMPLEX Instruction Fetch Branch Logic IAG Pipeline (IFP) IC1 8-Entry IC2 Branch Cache LIFO Return Ten-Instruction Stack ...

Page 3 re sc le ic to r, Freescale Semiconductor, Inc. MCF5407 Features Although the MCF5407 offers obvious performance upgrade advantages, its rich memory and peripheral integration at inexpensive prices sh...

Page 4 re sc le ic to r, Freescale Semiconductor, Inc. MCF5407 Features Two independent decoupled pipelines: four-stage instruction fetch pipeline (IFP) and five-stage operand execution pipeline (OEP) Ten-in...

Page 5 re sc le ic to r, Freescale Semiconductor, Inc. MCF5407 Features Operand packing and unpacking supported Auto-alignment transfers supported for efficient block movement Supports bursting and cycle ste...

Page 6 re sc le ic to r, Freescale Semiconductor, Inc. Cold Fire Module Description 16-bit general-purpose I/O interface IEEE 1149.1 test (JTAG) module System debug support Real-time trace for determining dy...

Page 7 re sc le ic to r, Freescale Semiconductor, Inc. Cold Fire Module Description time stalled waiting for instructions. To maximize the performance of conditional branch instructions, the Version 4 IFP im...

Page 8 re sc le ic to r, Freescale Semiconductor, Inc. Cold Fire Module Description 1.3.2 Harvard Architecture A Harvard memory architecture is implemented to support the increased bandwidth requirements of ...

Page 9 re sc le ic to r, Freescale Semiconductor, Inc. Cold Fire Module Description 1.3.5 UART Modules The MCF5407 contains two UARTs, which function independently. One UART has been enhanced to provide sync...

Page 10 re sc le ic to r, Freescale Semiconductor, Inc. Cold Fire Module Description CLKIN provides the time base through a programmable prescaler. The UART time scale can also be sourced from a timer input. ...

Page 11 re sc le ic to r, Freescale Semiconductor, Inc. Cold Fire Module Description 1.3.8.3 16-Bit Parallel Port Interface A 16-bit general-purpose programmable parallel port serves as either an input or an ...

Page 12 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set 1.3.10 PLL Module The MCF5407 PLL module is shown in Figure 3. CLKIN (to on-chip peripherals) B...

Page 13 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set 1.4.1 Programming Model Figure 4 shows the MCF5407 programming model. up er vi so eg is te rs s...

Page 14 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set 1.4.2 User Registers The user programming model, shown in Figure 4, is summarized in Table 1. T...

Page 15 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set 1.4.4 Addressing Modes Operands can be signed or unsigned and are contained in registers, memor...

Page 16 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set Table 4. Notational Conventions (continued) Instruction Operand Syntax Miscellaneous Operands #...

Page 17 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set Table 4. Notational Conventions (continued) Instruction Operand Syntax Subfields and Qualifiers...

Page 18 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set Table 5. Cold Fire Effective Addressing Modes Category Mode Reg. Addressing Modes Syntax Field ...

Page 19 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set Table 6. Specific Effective Addressing Modes for MOVE Instructions (continued) Source <EA&gt...

Page 20 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set instruction set opcodes, supported operation sizes, and assembler syntax. For two-operand instr...

Page 21 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set Table 9 describes supervisor-level instructions. Table 9. Supervisor-Level Instruction Set Summ...

Page 22 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set Table 10. User-Level Instruction Set Summary (continued) nstruction Operand Syntax Operand Size...

Page 23 re sc le ic to r, Freescale Semiconductor, Inc. Programming Model, Addressing Modes, and Instruction Set Table 10. User-Level Instruction Set Summary (continued) nstruction Operand Syntax Operand Size...

Page 24 re sc le ic to r, Freescale Semiconductor, Inc. General Device Information Table 10. User-Level Instruction Set Summary (continued) nstruction Operand Syntax Operand Size Operation ATS Dx .L if CCR.V=...

Page 25 re sc le ic to r, Freescale Semiconductor, Inc. General Device Information Table 12 lists additional MCF5407 documentation. Table 12. Documentation Documentation Number Documentation Title MCF5407UM/A...

Page 26 re sc le ic to r, Freescale Semiconductor, Inc. General Device Information MCF5407 Integrated Cold Fire® Microprocessor Product Brief MOTOROLA For More Information On This Product, Go to: www.freescal...

Page 27 re sc le ic to r, Freescale Semiconductor, Inc. General Device Information MOTOROLA MCF5407 Integrated Cold Fire® Microprocessor Product Brief 27 For More Information On This Product, Go to: www.frees...

Page 28 re sc le ic to r, Freescale Semiconductor, Inc. HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217 1-303-675-2140 or 1-800-441-24...

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Frequently Asked Questions

What is the primary performance rating of the MCF5407?

It delivers 316 Dhrystone MIPS at 220 MHz, or 233 Dhrystone MIPS at 162 MHz.

Does the processor support legacy architectures?

Yes, it provides a compatible path for 68K and ColdFire customers, allowing code translation from 68K assembly to ColdFire.

What cache architecture does the MCF5407 utilize?

It uses a Harvard memory architecture system featuring a 16-Kbyte instruction cache and an 8-Kbyte data cache.

What are the critical usage limitations of this microprocessor?

The product is not authorized or designed for use in life-support applications or surgical implants into the human body.

Motorola Freescale Semiconductor MCF5407PB D Rev. 3.3, 2 2003 MCF5407 Integrated ColdFire Microprocessor Product Brief

Summary

Figure1. MCF5407 Block Diagram

1.2.1 Process

1.3.1 ColdFire Core

1.3.1.1 Instruction Fetch Pipeline (IFP)

1.3.1.2 Operand Execution Pipeline (OEP)

1.3.1.3 MAC Module

1.3.1.4 Integer Divide Module

1.3.2 Harvard Architecture

1.3.2.1 16-Kbyte Instruction Cache/8-Kbyte Data Cache

1.3.2.2 Internal 2-Kbyte SRAMs

1.3.3 DRAM Controller

1.3.4 DMA Controller

1.3.5 UART Modules

Figure2. UART Module Block Diagram

1.3.6 Timer Module

1.3.7 I2C Module

1.3.8 System Interface

1.3.8.1 External Bus Interface

1.3.8.2 Chip Selects

1.3.8.3 16-Bit Parallel Port Interface

1.3.8.4 Interrupt Controller

1.3.8.5 JTAG

1.3.9 System Debug Interface

1.3.10 PLL Module

Figure3. PLL Module

1.4.1 Programming Model

Figure4. ColdFire MCF5407 Programming Model

1.4.2 User Registers

Table1. User-Level Registers

1.4.3 Supervisor Registers

Table2. Supervisor-Level Registers

1.4.4 Addressing Modes

Table3. MCF5407 Data Formats

Table4. Notational Conventions

1.4.4.1 Addressing Capability Summary

1.4.5 Instruction Set

Table8. ColdFire ISA B Extension Summary

Table9. Supervisor-Level Instruction Set Summary

Table10. User-Level Instruction Set Summary

Table11. MCF5407 Package/Frequency

Table12. Documentation

MCF5407 Integrated ColdFire® Microprocessor Product Brief

1.1 Features