Intel White Paper Protecting FPGA Designs from Common Threats

White Paper

Protecting the FPGA Design From Common Threats

As counterfeiting and IP theft increase, concerns regarding design and IP security also are on the rise. In the case of FPGAs, this requires protection of the bitstream and configuration of the device. Cyclone III LS FPGAs offer security features on a low-power platform, allowing designers to meet constraints and ship products with confidence their IP is protected.

Introduction The global estimated loss to counterfeiting is expected to exceed U.S.$1.5 trillion in 2009. Counterfeiting impacts all businesses in all markets, from Gucci handbags to computer chips to proprietary algorithms. The threats to companies’ intellectual property (IP) grow as the global supply chain becomes increasingly complex. Security and protection in the global supply chain is critical to maintaining a competitive advantage, while in some cases it is required just to stay in business.

The first step towards counterfeit equipment is tampering, which encompasses all forms of obtrusive efforts to gain access to the system design. Historically, tampering was associated with military equipment; however, due to the rise of counterfeit electronics, tampering is becoming a critical issue for all manufacturers. The purpose of anti-tamper is to deter reverse engineering of technology, which would otherwise allow technology transfer, alteration of system capability, and development of countermeasures.

Governments and corporations invest billions of dollars to develop critical networking infrastructures, sophisticated weapon systems, and secure banking systems. However, systems that are vulnerable to tampering can quickly deteriorate, resulting in loss of competitive advantage, lost revenue, brand dilution. The exploitation of electronic equipment is increasing due to the lucrative margins on counterfeit equipment. These vulnerabilities make the inclusion of anti-tamper more and more important.

There are four components to creating an anti-tamper solution:

Tamper resistance is the ability to resist tamper attempts, and is achieved by specialized features. Tamper detection is the ability to make the system or user aware of the tamper event. Tamper response is the countermeasure procedure that a system must take once tampering is detected. Tamper evidence must be detectable so authorized personnel inspecting the system can identify whether the system has been tampered with.

The components of anti-tamper and a preview of Altera® solutions for each component are summarized in Table 1.

Table 1. Anti-Tamper Components and Altera Solutions

Anti-Tamper Components Description Altera Cyclone III LS Solution Tamper resistance Specialized features Encryption key

JTAG-port protection

Tamper detection Awareness Programming failures

Cyclical redundancy check (CRC)

Tamper response Countermeasures Zeroization of all configuration memory Tamper evidence Visible evidence Multiple unsuccessful programming

Threats to ASICs The ASIC market is accustomed to protecting against tampering threats such as destructive analysis, over- and under-voltage analysis, and timing analysis. To reverse engineer an ASIC using destructive analysis, each layer of the device is captured to determine its functionality. Though this process requires expensive equipment and expertise,

WP-01111-1.0 June 2009, ver. 1.0