ALTERA Nios II Architect Design Tutorial Manual
Summary
Master the art of embedded system design with this comprehensive guide to Nios II System Architect. This tutorial is essential for hardware engineers looking to develop complex digital solutions using the powerful Nios II processor core. It walks you through the entire system development lifecycle, covering everything from initial setup and defining design requirements to building a complete system architecture. Learn how to integrate processors, DDR memory controllers, flash, and peripheral subsystems while managing critical connections like clocks and resets.
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Nios II System Architect Design Tutorial
Nios II System Architect Design
Tutorial
101 Innovation Drive San Jose, CA 95134 www.altera.com
TU-01004-2.0 Document last updated for Altera Complete Design Suite version: 11.0 Document publication date: June 2011
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Page Summary Contents For ALTERA Nios II Architect Design Tutorial Manual
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Nios II System Architect Design Tutorial Nios II System Architect Design Tutorial 101 Innovation Drive San Jose, CA 95134 www.altera.com TU-01004-2.0 Document last updated for Altera Complete Design S...
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© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U....
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Contents Chapter 1. Getting Started Hardware and Software Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1 Acquire the NEEK . ...
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iv Contents Additional Information Taking the Next Step . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1 Docum...
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1. Getting Started This tutorial teaches you how to use the Quartus® II software and the Nios® II Embedded Design Suite (EDS) to implement a digital picture viewer in a Cyclone III FPGA. In this tutor...
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1–2 Chapter 1: Getting Started Hardware and Software Requirements Install the USB Device Driver After the software is installed, you can connect the NEEK board to the USB port on your PC. If the softw...
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2. Designing the System To architect a system, you specify the design requirements and develop a suitable design strategy to address each requirement. Design requirements include immediate design goal...
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2–2 Chapter 2: Designing the System Design Flow Design Flow Figure 2–1 depicts the typical flow for embedded system design. Figure 2–1. System Design Flow Using Qsys In Qsys Define System Select Compo...
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Chapter 2: Designing the System 2–3 Design Requirements In this tutorial you perform the following steps: 1. Build a Qsys system: a. Open the Quartus II project. b. Start Qsys. c. Select and configure...
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2–4 Chapter 2: Designing the System Design Strategy Design Strategy Qsys provides standard hardware components that you can add to your system. You can add several instances of each component. The onl...
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Chapter 2: Designing the System 2–5 Design Strategy Table 2–1 shows how the individual design requirements for this project are implemented by specific design strategies, which in turn dictate the com...
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2–6 Chapter 2: Designing the System Block Diagram Block Diagram Figure 2–2 shows a high-level block diagram of the system you develop to implement the design. Figure 2–2. High-Level Block Diagram of D...
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3. Building the Qsys System In this chapter, you add components to the system, make connections where required, assign the clocks, set arbitration priorities, and generate the system. The tutorial com...
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3–2 Chapter 3: Building the Qsys System Specify Qsys System Components Specify Qsys System Components Table 3–1 shows the components of the completed design, including components in the subsystems. Ta...
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Chapter 3: Building the Qsys System 3–3 Specify Qsys System Components This section shows you how to perform the following actions: 1. Add a Nios II Processor to Your System. 2. Add a DDR SDRAM Contro...
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3–4 Chapter 3: Building the Qsys System Specify Qsys System Components 2. Select the Nios II/f processor. Figure 3–1 shows the Nios II Processor parameter editor after you select the Nios II/f core. F...
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Chapter 3: Building the Qsys System 3–5 Specify Qsys System Components Figure 3–2 shows the connection panel with the data_master port of cpu correctly connected. Figure 3–2. Qsys Connection Panel Add...
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3–6 Chapter 3: Building the Qsys System Specify Qsys System Components Figure 3–3 shows the Memory Settings tab after you assign these settings. Figure 3–3. Memory Settings for DDR SDRAM Controller wi...
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Chapter 3: Building the Qsys System 3–7 Specify Qsys System Components 7. In the Export column, click Click to export and set the following ddr_sdram signal rows to the following names: For external_c...
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3–8 Chapter 3: Building the Qsys System Specify Qsys System Components Figure 3–5 shows the component with the Intel 128P30 preset parameter settings. Figure 3–5. Flash Controller 4. Click Finish. 5. ...
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Chapter 3: Building the Qsys System 3–9 Complete the System Add a Video Subsystem The video subsystem consists of the video pipeline components. To add a video subsystem to your system, perform the fo...
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3–10 Chapter 3: Building the Qsys System Complete the System 5. Specify the Nios II Processor Boot Configuration. Specify the External Clocks and Clock Connections In this section, you connect each co...
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Chapter 3: Building the Qsys System 3–11 Complete the System 2. Select the desired clock name according to Table 3–2. Table 3–2 lists the clocks for the different component ports. For each clock, comp...
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3–12 Chapter 3: Building the Qsys System Complete the System 2. Reassign the following base addresses to the Avalon Memory-Mapped (Avalon-MM) slave ports of the following components: For the jtag_debu...
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Chapter 3: Building the Qsys System 3–13 Complete the System Table 3–3. Interrupt Priority Assignments (Part 2 of 2) Component Port Interrupt Priority Value peripheral_subsystem touch_panel_pen_irq_n ...
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3–14 Chapter 3: Building the Qsys System Complete the System Figure 3–11 shows the arbitration values after you make the assignments. Figure 3–11. Arbitration Priorities in Digital Picture Viewer Qsys...
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Chapter 3: Building the Qsys System 3–15 Complete the System 5. In the Exception Vector Offset box, type 0x20. Figure 3–12 shows the Nios II Processor parameter editor after you perform these steps. F...
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3–16 Chapter 3: Building the Qsys System Generate the System Figure 3–13 shows the finalized Qsys system. Figure 3–13. Final Digital Picture Viewer Qsys System Generate the System After you verify tha...
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Chapter 3: Building the Qsys System 3–17 Generate the System 1. On the Generation tab, click the Generate button. The Generate dialog box appears, displaying generation messages as generation proceeds...
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3–18 Chapter 3: Building the Qsys System Generate the System Nios II System Architect Design June 2011 Altera Corporation Tutorial
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4. Completing the Quartus II Project In this chapter, you complete the Quartus II project by adding the top-level HDL file, which instantiates the Qsys system, adding the timing constraints file, and ...
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4–2 Chapter 4: Completing the Quartus II Project Complete the Quartus II Project Figure 4–1 shows the files included in the project. Figure 4–1. Quartus II Project Files Add the Pin Assignments To add...
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Chapter 4: Completing the Quartus II Project 4–3 Configure the FPGA 2. When compilation completes, click OK to close the Full Compilation was successful message. Compilation produces the .sof file, &l...
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4–4 Chapter 4: Completing the Quartus II Project Configure the FPGA 10. If your .sof does not appear in the Quartus II Programmer, perform the following steps: a. Click Add File. b. Browse to locate &...
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5. Creating the Software Application In this chapter, you use the Nios II SBT for Eclipse to develop the software application that runs on your system. You create a new software application project, a...
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5–2 Chapter 5: Creating the Software Application Create a New Software Project Figure 5–1 shows the Nios II Board Support Package project wizard. Figure 5–1. Nios II Board Support Package Project Wiza...
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Chapter 5: Creating the Software Application 5–3 Add Source Code Files to the Project Figure 5–2 shows the New Project dialog box after you perform these steps. Figure 5–2. New Application Project Wiz...
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5–4 Chapter 5: Creating the Software Application Configure the BSP Properties 4. Right-click the picture_viewer folder, and click Refresh. The files copy to the software project directory, and their n...
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Chapter 5: Creating the Software Application 5–5 Configure the BSP Properties 3. For sys_clk_timer, select peripheral_subsystem_sys_clk_timer. Figure 5–4 shows the settings for the Nios II BSP Editor ...
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5–6 Chapter 5: Creating the Software Application Specify the Zip File System Settings 4. On the Linker Script tab, for each enabled row in the Linker Section Mappings table, select ddr_sdram in the Li...
Manual Details
| Brand | Altera |
|---|---|
| Pages | 50 |
| File Size | 2.41 MB |
| Published | May 13, 2026 |
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Frequently Asked Questions
What are the prerequisites before starting the design?
You must acquire the NEEK, install the Design Software, and set up the USB Device Driver.
How do I connect all system components in Qsys?
You need to specify System Components like the Nios II Processor, DDR SDRAM Controller, Flash Controller, and Video Subsystem. Remember to configure external clocks and connections.
What is required when building the system?
Before completing the design, you must reassign component base addresses to prevent memory conflicts, set interrupt/arbitration priorities, and specify the Nios II processor boot configuration.