AD8339 Rev. 0 Data Sheet - DC to 50 MHz, Quad IQ Demodulator and Phase Shifter

DC to 50 MHz, Quad I/Q Demodulator

and Phase Shifter

AD8339 FEATURES FUNCTIONAL BLOCK DIAGRAM

RF1PRF1N

Quad integrated I/Q demodulator 16 phase select on each output (22.5° per step) AD8339 Quadrature demodulation accuracy I1OP

Phase accuracy: ±1° SCLK SDI SERIAL

Amplitude balance: ±0.25 d B Q1OP

SDO INTERFACE

Bandwidth CSB

4LO: LF to 200 MHz I2OP

RF: LF to 50 MHz RF2N

Baseband: determined by external filtering

Output dynamic range: 160 d B/Hz ÷4 90°

LO drive: >0 d Bm (50 Ω), single-ended sine wave

Supply: ±5 V RF3N

Power consumption: 73 m W/channel (290 m W total)

Power-down via SPI (each channel and complete chip)

BIAS I4OP

APPLICATIONS

Medical imaging (CW ultrasound beamforming) Phased array systems

RF4PRF4N

Radar Adaptive antennas

Figure 1.

Communication receivers

GENERAL DESCRIPTION The AD83391 is a quad I/Q demodulator configured to be The mixer outputs are in current form for convenient summa- driven by a low noise preamplifier with differential outputs. It is tion. The independent I and Q mixer output currents are summed optimized for the LNA in the AD8332/AD8334/AD8335 family and converted to a voltage by a low noise, high dynamic range,

of VGAs. The part consists of four identical I/Q demodulators current-to-voltage (I-V) transimpedance amplifier, such as the

with a 4× local oscillator (LO) input that divides this signal and AD8021 or the AD829. Following the current summation, the generates the necessary 0° and 90° phases of the internal LO combined signal is applied to a high resolution analog-to-digital

that drive the mixers. The four I/Q demodulators can be used converter (ADC), such as the AD7665 (16-bit, 570 k SPS).

independently of each other (assuming that a common LO is

An SPI-compatible serial interface port is provided to easily

acceptable) because each has a separate RF input.

program the phase of each channel; the interface allows daisy Continuous wave (CW) analog beamforming (ABF) and I/Q chaining by shifting the data through each chip from SDI to SDO.

demodulation are combined in a single 40-lead ultracompact The SPI also allows for power-down of each individual channel chip scale device, making the AD8339 particularly applicable in and the complete chip. During power-down, the serial interface high density ultrasound scanners. In an ABF system, time remains active so that the device can be programmed again.

domain coherency is achieved following the appropriate phase

The dynamic range is typically 160 d B/Hz at the I and Q

alignment and summation of multiple receiver channels. A reset

outputs. The AD8339 is available in a 6 mm × 6 mm, 40-lead

pin synchronizes multiple ICs to start each LO divider in the

LFCSP and is specified over the industrial temperature range of

same quadrant. Sixteen programmable 22.5° phase increments

−40°C to +85°C.

are available for each channel. For example, if Channel 1 is used as a reference and Channel 2 has an I/Q phase lead of 45°, then the user can phase align Channel 2 with Channel 1 by choosing the correct code.

1 Patent pending.

Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

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