Texas Instruments SN54AC245, SN74AC245 Owners Manual User Guide

SCAS461F − FEBRUARY 1995 − REVISED OCTOBER 2003

2-V to 6-V VCC Operation SN54AC245 J OR W PACKAGE SN74AC245 DB, DW, N, NS, OR PW PACKAGE

Inputs Accept Voltages to 6 V

(TOP VIEW)

Max tpd of 7 ns at 5 V

DIR VCC

description/ordering information

A1 OE A2 B1

The ’AC245 octal bus transceivers are designed

for asynchronous two-way communication

between data buses. The control-function

implementation minimizes external timing

requirements.

When the output-enable (OE) is low, the device

passes noninverted data from the A bus to the B

GND B8

bus or from the B bus to the A bus, depending on the logic level at the direction control (DIR) input.

SN54AC245 FK PACKAGE

A high on OE disables the device so that the buses

(TOP VIEW)

are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of

the resistor is determined by the current-sinking

capability of the driver.

ORDERING INFORMATION

ORDERABLE TOP-SIDE

TA PACKAGE†

PART NUMBER MARKING

PDIP − N Tube SN74AC245N SN74AC245N

Tube SN74AC245DW

SOIC − DW AC245

Tape and reel SN74AC245DWR

−40°C to 85°C SOP − NS Tape and reel SN74AC245NSR AC245 SSOP − DB Tape and reel SN74AC245DBR AC245

Tube SN74AC245PW

TSSOP − PW AC245

Tape and reel SN74AC245PWR

CDIP − J Tube SNJ54AC245J SNJ54AC245J −55°C to 125°C CFP − W Tube SNJ54AC245W SNJ54AC245W LCCC − FK Tube SNJ54AC245FK SNJ54AC245FK

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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