Texas Instruments CD54 CD74HCT4051-4052-4053-4054 Data Sheet

Summary

This comprehensive manual details TI's high-speed analog multiplexers and demultiplexers (HC/HCT series). Ideal for electronics professionals, these digitally controlled switches utilize robust CMOS technology to reliably route and switch varying analog signals in complex circuits. The guide provides critical specifications regarding operational voltage ranges, temperature resilience (-55°C to 125°C), low on-resistance performance, various package options (SOIC, TSSOP), and compatibility details for circuit integration, making it essential for signal management design.

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查询5962-8775401EA供应商

CD54/74HC4051, CD54/74HCT4051, CD54/74HC4052, CD74HCT4052,

Data sheet acquired from Harris Semiconductor SCHS122I CD54/74HC4053, CD74HCT4053

High-Speed CMOS Logic

November 1997 - Revised July 2004 Analog Multiplexers/Demultiplexers

Features Ordering Information

Wide Analog Input Voltage Range . . . . . . . . . . ±5V Max TEMP. RANGE

[ /Title PART NUMBER (o C) PACKAGE

Low “On” Resistance

(CD54 CD74HC4051E -55 to 125 16 Ld PDIP

70Ω Typical (VCC - VEE = 4.5V)

HC405 CD74HC4051M -55 to 125 16 Ld SOIC

40Ω Typical (VCC - VEE = 9V)

1, CD74HC4051MT -55 to 125 16 Ld SOIC

Low Crosstalk between Switches

CD74 CD74HC4051M96 -55 to 125 16 Ld SOIC

HC405 Fast Switching and Propagation Speeds CD74HC4051NSR -55 to 125 16 Ld SOP

1, “Break-Before-Make” Switching CD74HC4051PWR -55 to 125 16 Ld TSSOP CD74 CD74HC4051PWT -55 to 125 16 Ld TSSOP

Wide Operating Temperature Range . . -55o C to 125o C

HCT40 CD74HC4052E -55 to 125 16 Ld PDIP

CD54HC/CD74HC Types

51, CD74HC4052M -55 to 125 16 Ld SOIC

Operation Control Voltage . . . . . . . . . . . . . . 2V to 6V

CD74 CD74HC4052MT -55 to 125 16 Ld SOIC

Switch Voltage . . . . . . . . . . . . . . . . . . . . . . . 0V to 10V

HC405 CD74HC4052M96 -55 to 125 16 Ld SOIC

High Noise Immunity . . . NIL = 30%, NIH = 30% of VCC,

2, VCC = 5V CD74HC4052NSR -55 to 125 16 Ld SOP CD74HC4052PW -55 to 125 16 Ld TSSOP

CD54HCT/CD74HCT Types

CD74HC4052PWR -55 to 125 16 Ld TSSOP

Operation Control Voltage . . . . . . . . . . . 4.5V to 5.5V

CD74HC4052PWT -55 to 125 16 Ld TSSOP

Switch Voltage . . . . . . . . . . . . . . . . . . . . . . . 0V to 10V

Direct LSTTL Input CD74HC4053E -55 to 125 16 Ld PDIP

Logic Compatibility . . . VIL = 0.8V Max, VIH = 2V Min CD74HC4053M -55 to 125 16 Ld SOIC CMOS Input Compatibility . . . . . II ≤ 1µA at VOL, VOH

CD74HC4053MT -55 to 125 16 Ld SOIC CD74HC4053M96 -55 to 125 16 Ld SOIC CD74HC4053NSR -55 to 125 16 Ld SOP

Description CD74HC4053PW -55 to 125 16 Ld TSSOP

CD74HC4053PWR -55 to 125 16 Ld TSSOP

These devices are digitally controlled analog switches which utilize silicon gate CMOS technology to achieve operating CD74HC4053PWT -55 to 125 16 Ld TSSOP speeds similar to LSTTL with the low power consumption of

CD74HCT4051E -55 to 125 16 Ld PDIP

standard CMOS integrated circuits.

CD74HCT4051M -55 to 125 16 Ld SOIC CD74HCT4051MT -55 to 125 16 Ld SOIC

These analog multiplexers/demultiplexers control analog voltages that may vary across the voltage supply range (i.e. CD74HCT4051M96 -55 to 125 16 Ld SOIC VCC to VEE). They are bidirectional switches thus allowing

CD74HCT4052E -55 to 125 16 Ld PDIP

any analog input to be used as an output and vice-versa.

CD74HCT4052M -55 to 125 16 Ld SOIC

The switches have low “on” resistance and low “off” leak-

ages. In addition, all three devices have an enable control CD74HCT4052MT -55 to 125 16 Ld SOIC

which, when high, disables all switches to their “off” state. CD74HCT4052M96 -55 to 125 16 Ld SOIC

CD74HCT4053E -55 to 125 16 Ld PDIP CD74HCT4053M -55 to 125 16 Ld SOIC

Ordering Information

CD74HCT4053MT -55 to 125 16 Ld SOIC

TEMP. RANGE

CD74HCT4053M96 -55 to 125 16 Ld SOIC

PART NUMBER (o C) PACKAGE

CD74HCT4053PWR -55 to 125 16 Ld TSSOP

CD54HC4051F3A -55 to 125 16 Ld CERDIP

CD74HCT4053PWT -55 to 125 16 Ld TSSOP

CD54HC4052F3A -55 to 125 16 Ld CERDIP

NOTE: When ordering, use the entire part number. The suffixes 96

CD54HC4053F3A -55 to 125 16 Ld CERDIP

and R denote tape and reel. The suffix T denotes a small-quantity

CD54HCT4051F3A -55 to 125 16 Ld CERDIP reel of 250.

Page Summary Contents For Texas Instruments CD54 CD74HCT4051-4052-4053-4054 Data Sheet

Page 1 查询5962-8775401EA供应商 CD54/74HC4051, CD54/74HCT4051, CD54/74HC4052, CD74HCT4052, Data sheet acquired from Harris Semiconductor SCHS122I CD54/74HC4053, CD74HCT4053 High-Speed CMOS Logic November 1997 - R...

Page 2 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Pinouts CD54HC4051, CD54HCT4051 CD54HC4052 (CERDIP) (CERDIP) CD74HC4051 CD74HC4052 (PDIP, SOIC, SOP, TSSOP) (PDIP, SOIC, SOP, TSSOP) CD74H...

Page 3 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Functional Diagram of HC/HCT4051 CHANNEL IN/OUT VCC A7 A6 A5 A4 A3 A2 A1 A0 BINARY COMMON LOGIC OUT/IN 1 OF 8 LEVEL TG DECODER CONVERSION ...

Page 4 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Functional Diagram of ’HC4052, CD74HCT4052 A CHANNELS IN/OUT COMMON A BINARY TO OUT/IN LOGIC S1 1 OF 4 LEVEL DECODER CONVERSION COMMON B W...

Page 5 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Functional Diagram of ’HC4053, CD74HCT4053 IN/OUT BINARY TO 1 OF 2 LOGIC LEVEL DECODERS CONVERSION WITH ENABLE A COMMON OUT/IN S1 B COMMON...

Page 6 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Absolute Maximum Ratings (Note 2) Thermal Information DC Supply Voltage, VCC - VEE . . . . . . . . . . . . . . . . . -0.5V to 10.5V Packag...

Page 7 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 DC Electrical Specifications TEST CONDITIONS AMBIENT TEMPERATURE, TA VIS VI VEE VCC PARAMETER (V) (V) (V) (V) MIN TYP MAX MIN MAX MIN MAX ...

Page 8 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 DC Electrical Specifications (Continued) TEST CONDITIONS AMBIENT TEMPERATURE, TA VIS VI VEE VCC PARAMETER (V) (V) (V) (V) MIN TYP MAX MIN ...

Page 9 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Switching Specifications VCC = 5V, TA = 25o C, Input tr, tr = 6ns TYPICAL PARAMETER (p F) HC HCT HC HCT HC HCT UNITS Propagation Delay Swi...

Page 10 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Switching Specifications CL = 50p F, Input tr, tr = 6ns (Continued) AMBIENT TEMPERATURE, TA HC HCT HC HCT HC HCT VEE VCC PARAMETER (V) (V)...

Page 11 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Analog Channel Specifications Typical Values at TA = 25o C HC/HCT VEE VCC HC/ PARAMETER TEST CONDITIONS TYPES (V) (V) HCT UNITS Crosstalk ...

Page 12 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Test Circuits and Waveforms SWITCH INPUT f IS = 1MHz SINEWAVE VCC R = 50Ω VCC/2 VOSSWITCH ON VCC METER SWITCH VCC/2 VCC/2 METER VCC/2 FIGU...

Page 13 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Test Circuits and Waveforms (Continued) tr = 6ns tf = 6ns SWITCH INPUT 50% t PHLt PLH SWITCH OUTPUT 50% FIGURE 8A. 6ns 6ns 6ns tr tf 6ns V...

Page 14 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Typical Performance Curves VCC - VEE = 4.5V VCC - VEE = 6V IS TA VCC - VEE = 9V INPUT SIGNAL VOLTAGE (V) FIGURE 11. TYPICAL ON RESISTANCE ...

Page 15 ’HC4051, ’HCT4051, ’HC4052, CD74HCT4052, ’HC4053, CD74HCT4053 Typical Performance Curves (Continued) VCC = 2.25V -20 GND = -2.25V VCC = 4.5V VEE = -2.25V GND = -4.5V RL = 50Ω VEE = -4.5V PIN 5 TO 4 RL...

Page 16 PACKAGE OPTION ADDENDUM www.ti.com 5-Dec-2005 PACKAGING INFORMATION Orderable Device Status Package Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Type Drawing Qty 5962-8775401EA ACTIVE ...

Page 17 PACKAGE OPTION ADDENDUM www.ti.com 5-Dec-2005 Orderable Device Status Package Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Type Drawing Qty CD74HC4052M96E4 ACTIVE SOIC Green (Ro HS CU ...

Page 18 PACKAGE OPTION ADDENDUM www.ti.com 5-Dec-2005 Orderable Device Status Package Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Type Drawing Qty CD74HC4053PWE4 ACTIVE TSSOP PW Green (Ro HS ...

Page 19 PACKAGE OPTION ADDENDUM www.ti.com 5-Dec-2005 Orderable Device Status Package Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Type Drawing Qty CD74HCT4052MT ACTIVE SOIC Green (Ro HS CU NI...

Page 20 PACKAGE OPTION ADDENDUM www.ti.com 5-Dec-2005 provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such i...

Page 25 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN Gage Plane Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** DIM A MAX 6,506,50 7,50 8,50...

Page 26 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,15 NOM Gage Plane Seating Plane 1,20 MAX 0,10 PINS ** DIM A MAX 3,10 5,10 ...

Page 27 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and servic...

Manual Details

Brand	Texas Instruments
Pages	27
File Size	459.70 KB
Published	June 01, 2026

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Frequently Asked Questions

What are the general operating temperature ratings for these ICs?

Most models listed operate across a wide range of -55°C to 125°C.

How does the enable control function on the multiplexers?

The device has an enable control; when this input is high, it forces all switches into their 'off' state.

What type of switching technology do these devices use?

They are digitally controlled analog switches utilizing silicon gate CMOS technology to achieve low power consumption and fast speeds.

Are precautions needed during component handling?

Yes, the documents caution that all devices are sensitive to electrostatic discharge, requiring proper IC Handling Procedures.

What level shifting input support is available on this series?

Specific models, like CD74HC4053, provide compatibility options for LSTTL input logic and general CMOS inputs.