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National DS40MB200 Data Manual

Summary

A specialized dual 2:1 multiplexer and 1:2 buffer designed for ultra-reliable, high-speed data paths up to 4 Gbps. This component enhances signal integrity in complex backplane systems using advanced features like controlled input equalization and programmable output pre-emphasis, compensating effectively for transmission losses on long FR4 substrates. The product manual provides detailed electrical specifications, pin descriptions, and functional diagrams required by engineers designing premium network infrastructure and demanding high-speed communication equipment.

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查询DS40MB200供应商

August

40M ual4 b/s 1:2 ux/B uffer ith Input qualization and utput re-E phasis

DS40MB200 Dual Gb/s 1:2 Mux/Buffer with Input Equalization and Output Pre-Emphasis General Description Features

The DS40MB200 is dual signal conditioning 2:1 multi- Dual 2:1 multiplexer and 1:2 buffer plexer and 1:2 fan-out buffer designed for use in backplane 1– Gbps fully differential data paths

redundancy applications. Signal conditioning features in- Fixed input equalization clude input equalization and programmable output pre-

Programmable output pre-emphasis

emphasis that enable data communication in FR4 back-

Independent switch and line side pre-emphasis controls

planes up to Gb/s. Each input stage has fixed equalizer

Programmable switch-side loopback mode

to reduce ISI distortion from board traces. All output drivers

On-chip terminations

have selectable steps of pre-emphasis to compensate for

+3.3V supply

transmission losses from long FR4 backplanes and reduce

deterministic jitter. The pre-emphasis levels can be indepen- Low power, 1W max dently controlled for the line-side and switch-side drivers. Lead-less LLP-48 package (7mmx7mmx0.8mm, 0.5mm The internal loopback paths from switch-side input to switch- pitch)

side output enable at-speed system testing. All receiver 0˚C to +85˚C operating temperature range inputs and driver outputs are internally terminated with 100Ω differential terminating resistors

Functional Block Diagram

National Semiconductor Corporation DS200217 www.national.com

Page Summary Contents For National DS40MB200 Data Manual

Page 1 查询DS40MB200供应商 August 40M ual4 b/s 1:2 ux/B uffer ith Input qualization and utput re-E phasis DS40MB200 Dual Gb/s 1:2 Mux/Buffer with Input Equalization and Output Pre-Emphasis General Description Fea...
Page 2 Simplified Block Diagram www.national.com
Page 3 Connection Diagram 40M Order number DS40MB200SQ See NS Package Number SQA48D www.national.com3
Page 4 Pin Descriptions Pin Name I/O Description Number LINE SIDE HIGH SPEED DIFFERENTIAL IO’s LI_0+ Inverting and non-inverting differential inputs of port_0 at the line side. LI_0+ and LI_0− LI_0− have an ...
Page 5 Pin Descriptions (Continued) 40M Pin Name I/O Description Number POWER VCC 2, 8, 14, VCC 3.3V 5%. 20, 29, 35, Each VCC pin should be connected to the VCC plane through low inductance path, 38, typical...
Page 6 Functional Descriptions (Continued) TABLE 3. LINE-SIDE PRE-EMPHASIS CONTROLS Pre-Emphasis Level in De-Emphasis Level Pre-Emphasis in d B Typical FR4 board Pre L_[1:0] m VPP in m VPP (VODPE/VODB) trace...
Page 7 Absolute Maximum Ratings (Note 1) Thermal Resistance, θJC-top 20.7˚C/W If Military/Aerospace specified devices are required, Thermal Resistance, θJC-bottom 5.8˚C/W please contact the National Semicond...
Page 8 Electrical Characteristics (Continued) Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter Conditions Min Max Units (Note 2) DRIVER SPECIFICATIONS VPE...
Page 9 Electrical Characteristics (Continued) 40M Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter Conditions Min Max Units (Note 2) AC CHARACTERISTICS t ...
Page 10 Timing Diagrams (Continued) FIGURE 3. Propagation Delay from input to output FIGURE 4. Test condition for output pre-emphasis duration FIGURE 5. AC Test Circuit The DS40MB200 input equalizer provides ...
Page 11 Timing Diagrams (Continued) 40M Finished Trace Separation between Dielectric Constant Trace Length Width Traces Dielectric Height e R Loss Tangent inches 8.5 mil 11.5 mil mil 3.8 0.022 FIGURE 6. Data ...
Page 12 Timing Diagrams (Continued) FIGURE 7. Data input and output eye patterns with driver set to 9d B pre-emphasis www.national.com
Page 13 Application Information 40M FIGURE 8. Application diagram (showing data paths of port 0) www.national.com13
Page 14 Physical Dimensions inches (millimeters) unless otherwise noted ua l4 b/ 1: ux /B uf fe ith In pu qu al iz at io an ut pu re -E ph as is LLP-48 Package National does not assume any responsibility for ...

Manual Details

Brand National
Pages 14
File Size 1001.07 KB
Published May 29, 2026
64 views

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Frequently Asked Questions

What signal paths does the DS40MB200 support?

It is designed for 1–4 Gbps fully differential data paths, suitable for redundancy applications.

How can I control the output pre-emphasis settings?

Pre-emphasis levels are controlled by the PREL_x and PRES_x digital input pins.

Does the device support board testing or signal integrity verification?

Yes, it includes a programmable switch-side loopback mode to reduce ISI distortion from board traces.

What is the required operating temperature range for this module?

The inputs and driver outputs operate within an internal -20°C to +85°C temperature range.