Intel White Paper on Implementing Medical Imaging Using FPGAs

Medical Imaging Implementation Using

FPGAs

WP-MEDICAL-2.0 White Paper

Medical imaging equipment is taking on an increasingly critical role in healthcare as the industry strives to lower patient costs and achieve earlier disease prediction using non- invasive means. To provide the functionality needed to meet these industry goals, equipment developers are turning to programmable logic devices such as Altera’s FPGAs.

Introduction

Earlier prediction and treatment are driving the fusion of modalities such as positron emission tomography (PET)/computerized tomography (CT) and X-ray/CT equipment. The higher image resolutions that are needed require fine geometry micro-array detectors coupled with sophisticated software/hardware systems for the analysis of photonic and electronic signals. These systems must provide both highly accurate and extremely fast processing of large amounts of image data (up to 250 GMACS and 1 Gbps). Furthermore, to lower patient costs, each piece of equipment must be lower priced and possess a longer life utility. This calls for more flexible systems with the capability to continually update features and algorithms over the equipment’s lifetime. Together, flexible algorithm deployment and modality fusion compel the use of programmable system electronic components, such as high-powered CPUs and FPGAs.

Several factors should be considered in the efficient development of flexible medical imaging equipment:

Development of imaging algorithms requires high-level intuitive modeling tools for continual improvements in digital signal processing (DSP).

The performance needs for near-real-time analysis require system platforms that scale with both software (CPUs) and hardware (configurable logic). These processing platforms must meet various performance price points and be capable of bridging the fusion of multiple imaging modalities.

System architects and design engineers need to quickly partition and debug algorithms on these platforms, using the latest tools and intellectual property (IP) libraries to speed their deployment and improve profitability.

With these factors in mind, Altera provides its modular Video and Image Processing (VIP) Suite, a blockset of key IP building blocks that can accelerate the development and implementation of sophisticated imaging algorithms into FPGAs. The VIP Suite blockset, along with other Altera® and partner IP modules and reference designs (including IQ modems, JPEG2000 compression, fast Fourier transform (FFT)/inverse fast Fourier transform (IFFT), edge detection, etc.), provide a broad range of tools designers can use to speed FPGA implementations of computationally intensive tasks.

Copyright © 2010 Altera Corp oration. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRAT IX are Reg. U.S. Pat. & Tm. Off. and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademark s and service marks are the property of their respective holders as described at www.altera.com/common/le gal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s stand ard warranty, but reserves the right to make changes to any products and services at any time

101 Innovation Drive

without notice. Altera assume s no responsibility or liability arising out of the application or use of any information, product, or San Jose, CA 95134 service described herein excep t as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specification s before relying on any published information and before placing orders for products or services.

www.altera.com

July 2010 Altera Corporation

Feedback Subscribe