ANALOG DEVICES AD9850 CMOS, 125 MHz Complete DDS Synthesizer Owner's Manual & User Guide

CMOS, 125 MHz Complete DDS Synthesizer AD9850 FEATURES FUNCTIONAL BLOCK DIAGRAM

125 MHz Clock Rate

+VS GND

On-Chip High Performance DAC and High Speed

Comparator DAC RSET

DAC SFDR > 50 d B @ 40 MHz AOUT CLOCK IN HIGH SPEED 10-BIT ANALOG DDS DAC OUT

32-Bit Frequency Tuning Word MASTER RESET

Simplified Control Interface: Parallel Byte or Serial PHASE

32-BIT

Loading Format TUNING

CONTROL ANALOG

WORDS IN

Phase Modulation Capability FREQUENCY UPDATE/ FREQUENCY/PHASE

+3.3 V or +5 V Single Supply Operation DATA REGISTER DATA REGISTER

CLOCK OUT

RESET

Low Power: 380 m W @ 125 MHz (+5 V)

CLOCK OUT

Low Power: 155 m W @ 110 MHz (+3.3 V) WORD LOAD COMPARATOR

DATA INPUT REGISTER

CLOCK

Power-Down Function

SERIAL PARALLEL AD9850

Ultrasmall 28-Lead SSOP Packaging LOAD LOAD

1-BIT 8-BITS

APPLICATIONS

40 LOADS 5 LOADS

Frequency/Phase–Agile Sine-Wave Synthesis

FREQUENCY, PHASE, AND CONTROL

DATA INPUT

Clock Recovery and Locking Circuitry for Digital Communications Digitally Controlled ADC Encode Generator Agile Local Oscillator Applications

GENERAL DESCRIPTION combination thereof. The AD9850 also contains a high speed The AD9850 is a highly integrated device that uses advanced comparator that can be configured to accept the (externally) DDS technology coupled with an internal high speed, high filtered output of the DAC to generate a low jitter square wave performance, D/A converter and comparator, to form a com- output. This facilitates the device’s use as an agile clock gen- plete digitally programmable frequency synthesizer and clock erator function.

generator function. When referenced to an accurate clock

The frequency tuning, control, and phase modulation words are

source, the AD9850 generates a spectrally pure, frequency/

loaded into the AD9850 via a parallel byte or serial loading

phase-programmable, analog output sine wave. This sine wave

format. The parallel load format consists of five iterative loads

can be used directly as a frequency source or converted to a

of an 8-bit control word (byte). The first byte controls phase

square wave for agile-clock generator applications. The AD9850’s

modulation, power-down enable, and loading format; bytes 2–5

innovative high speed DDS core provides a 32-bit frequency

comprise the 32-bit frequency tuning word. Serial loading is

tuning word, which results in an output tuning resolution of

accomplished via a 40-bit serial data stream on a single pin. The

0.0291 Hz, for a 125 MHz reference clock input. The

AD9850 Complete-DDS uses advanced CMOS technology to

AD9850’s circuit architecture allows the generation of output

provide this breakthrough level of functionality and performance

frequencies of up to one-half the reference clock frequency (or

on just 155 m W of power dissipation (+3.3 V supply).

62.5 MHz), and the output frequency can be digitally changed

The AD9850 is available in a space saving 28-lead SSOP, sur-

(asynchronously) at a rate of up to 23 million new frequencies

face mount package. It is specified to operate over the extended

per second. The device also provides five bits of digitally

industrial temperature range of –40°C to +85°C.

controlled phase modulation, which enables phase shifting of its output in increments of 180°, 90°, 45°, 22.5°, 11.25° and any

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