AMD Am27C040 4 Megabit (512 K x 8-Bit) CMOS EPROM User Manual

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Am27C040 4 Megabit (512 K x 8-Bit) CMOS EPROM

DISTINCTIVE CHARACTERISTICS Fast access time Single +5 V power supply Available in speed options as fast as 90 ns ±10% power supply tolerance standard Low power consumption 100% Flashrite™ programming <10 µA typical CMOS standby current Typical programming time of 1 minute

JEDEC-approved pinout Latch-up protected to 100 m A from –1 V to VCC + 1 V

Plug-in upgrade for 1 Mbit and 2 Mbit EPROMs

High noise immunity

Easy upgrade from 28-pin JEDEC EPROMs

Compact 32-pin DIP, PDIP, PLCC packages

GENERAL DESCRIPTION The Am27C040 is a 4 Mbit ultraviolet erasable pro- thus eliminating bus contention in a multiple bus micro- grammable read-only memory. It is organized as 512K processor system. bytes, operates from a single +5 V supply, has a static

AMD’s CMOS process technology provides high

standby mode, and features fast single address loca-

speed, low power, and high noise immunity. Typical

tion programming. The device is available in windowed

power consumption is only 100 m W in active mode,

ceramic DIP packages and plastic one-time program-

and 50 µW in standby mode.

mable (OTP) packages.

All signals are TTL levels, including programming sig-

Data can be typically accessed in less than 90 ns, al-

nals. Bit locations may be programmed singly, in

lowing high-performance microprocessors to operate

blocks, or at random. The device supports AMD’s

without any WAIT states. The device offers separate

Flashrite programming algorithm (100 µs pulses) re-

Output Enable (OE#) and Chip Enable (CE#) controls,

sulting in typical programming time of 1 minute.

BLOCK DIAGRAM

VCC Data Outputs

DQ0–DQ7

VSS VPP

OE# Output Enable Chip Enable

Output

Buffers

CE#/PGM# Prog Logic

Decoder Gating

A0–A18 Address

Inputs 4,194,304-Bit

Decoder Cell Matrix

Publication# 14971 Rev: G Amendment/0 Issue Date: May 1998