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ATMEL AVR Microcontroller ATmega324PA Data Sheet

Summary

Master this feature-rich, low-power AVR 8-bit Microcontroller (ATmega164PA/324PA) datasheet. This comprehensive documentation serves embedded system designers requiring dependable performance for diverse projects. It details the advanced RISC architecture, full peripheral capabilities—including ADC, multiple USARTs, and SPI—and provides detailed specifications on critical items such as pin configurations across various packages (e.g., TQFP, VQFN), memory retention, power consumption, and operating voltages.

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BDTIC www.bdtic.com/ATMEL

Features High-performance, Low-power AVR® 8-bit Microcontroller Advanced RISC Architecture 131 Powerful Instructions – Most Single-clock Cycle Execution 32 x 8 General Purpose Working Registers Fully Static Operation Up to 20 MIPS Throughput at 20 MHz On-chip 2-cycle Multiplier High Endurance Non-volatile Memory segments 16/32K Bytes of In-System Self-programmable Flash program memory 512B/1K Bytes EEPROM

8-bit

1/2K Bytes Internal SRAM Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM

Microcontroller

Data retention: 20 years at 85°C/ 100 years at 25°C(1) Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program with 16/32K

True Read-While-Write Operation Programming Lock for Software Security Bytes In-System JTAG (IEEE std. 1149.1 Compliant) Interface Boundary-scan Capabilities According to the JTAG Standard

Programmable

Extensive On-chip Debug Support Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

Flash

Peripheral Features Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode Real Time Counter with Separate Oscillator

Six PWM Channels ATmega164PA

8-channel, 10-bit ADC

Differential mode with selectable gain at 1x, 10x or 200x ATmega324PA

Byte-oriented Two-wire Serial Interface Two Programmable Serial USART Master/Slave SPI Serial Interface Programmable Watchdog Timer with Separate On-chip Oscillator On-chip Analog Comparator Interrupt and Wake-up on Pin Change Special Microcontroller Features Power-on Reset and Programmable Brown-out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby I/O and Packages 32 Programmable I/O Lines 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF 44-pad DRQFN 49-ball VFBGA Operating Voltages 1.8 - 5.5V Speed Grades 0 - 20MHz @ 1.8 - 5.5V Power Consumption at 1 MHz, 1.8V, 25°C Active: 0.4 m A Power-down Mode: 0.1µA Power-save Mode: 0.6µA (Including 32 k Hz RTC)

Note: 1. See ”Data Retention” on page 9 for details.

8152BS–AVR–02/09

Page Summary Contents For ATMEL AVR Microcontroller ATmega324PA Data Sheet

Page 1 BDTIC www.bdtic.com/ATMEL Features High-performance, Low-power AVR® 8-bit Microcontroller Advanced RISC Architecture 131 Powerful Instructions – Most Single-clock Cycle Execution 32 x 8 General Purpos...
Page 2 1. Pin Configurations 1.1 Pinout - PDIP/TQFP/VQFN/QFN/MLF Figure 1-1. Pinout (PCINT8/XCK0/T0) PB0 PA0 (ADC0/PCINT0) (PCINT9/CLKO/T1) PB1 PA1 (ADC1/PCINT1) (PCINT10/INT2/AIN0) PB2 PA2 (ADC2/PCINT2) (PC...
Page 3 ATmega164PA/324PA 1.2 Pinout - DRQFN Figure 1-2. DRQFN - Pinout Top view Bottom view Table 1-1. DRQFN - Pinout A1 PB5 A7 PD3 A13 PC4 A19 PA3 B1 PB6 B6 PD4 B11 PC5 B16 PA2 A2 PB7 A8 PD5 A14 PC6 A20 PA1...
Page 4 1.3 Pinout - VFBGA Figure 1-3. VFBGA - Pinout Top view Bottom view Table 1-2. BGA - Pinout GND PB4 PB2 GND VCC PA2 GND PB6 PB5 PB3 PB0 PA0 PA3 PA5 VCC RESET PB7 PB1 PA1 PA6 AREF GND XTAL2 PD0 GND PA4 ...
Page 5 ATmega164PA/324PA 2. Overview The ATmega164PA/324PA is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, t...
Page 6 The ATmega164PA/324PA provides the following features: 16/32K bytes of In-System Program- mable Flash with Read-While-Write capabilities, 512B/1K bytes EEPROM, 1/2K bytes SRAM, 32 general purpose I/O ...
Page 7 ATmega164PA/324PA 2.3 Pin Descriptions 2.3.1 VCC Digital supply voltage. 2.3.2 GND Ground. 2.3.3 Port A (PA7:PA0) Port A serves as analog inputs to the Analog-to-digital Converter. Port A also serves ...
Page 8 2.3.7 RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. The minimum pulse length is given in ”System and Rese...
Page 9 ATmega164PA/324PA 3. About 3.1 Resources A comprehensive set of development tools, application notes and datasheetsare available for download on http://www.atmel.com/avr. 3.2 About Code Examples This ...
Page 10 4. Register Summary Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0x FF) Reserved (0x FE) Reserved (0x FD) Reserved (0x FC) Reserved (0x FB) Reserved (0x FA) Reserved (0x F9) Rese...
Page 11 ATmega164PA/324PA Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0x C0) UCSR0A RXC0 TXC0 UDRE0 FE0 DOR0 UPE0 U2X0 MPCM0 190/205 (0x BF) Reserved (0x BE) Reserved (0x BD) TWAMR TWAM...
Page 12 Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0x7E) DIDR0 ADC7D ADC6D ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D (0x7D) Reserved (0x7C) ADMUX REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0 (...
Page 13 ATmega164PA/324PA Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page 0x1C (0x3C) EIFR INTF2 INTF1 INTF0 0x1B (0x3B) PCIFR PCIF3 PCIF2 PCIF1 PCIF0 0x1A (0x3A) Reserved 0x19 (0x39) Reserv...
Page 14 5. Instruction Set Summary Mnemonics Operands Description Operation Flags #Clocks ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers Rd ← Rd + Rr Z,C,N,V,H ADC Rd, Rr Add with Carry two Re...
Page 15 ATmega164PA/324PA Mnemonics Operands Description Operation Flags #Clocks BRVC Branch if Overflow Flag is Cleared if (V = 0) then PC ← PC + k + 1 None 1/2 BRIE Branch if Interrupt Enabled if ( I = 1) t...
Page 16 Mnemonics Operands Description Operation Flags #Clocks SPM Store Program Memory (Z) ← R1:R0 None IN Rd, P In Port Rd ← P None OUT P, Rr Out Port P ← Rr None PUSH Rr Push Register on Stack STACK ← Rr N...
Page 17 ATmega164PA/324PA 6. Ordering Information 6.1 ATmega164PA Speed (MHz)(3) Power Supply Ordering Code(2) Package(1) Operational Range ATmega164PA-AU 44A ATmega164PA-PU 40P6 Industrial 1.8 - 5.5V ATmega1...
Page 18 6.2 ATmega324PA Speed (MHz)(3) Power Supply Ordering Code(2) Package(1) Operational Range ATmega324PA-AU 44A ATmega324PA-PU 40P6 Industrial 1.8 - 5.5V ATmega324PA-MU 44M1 (-40o C to 85o C) ATmega324PA...
Page 19 ATmega164PA/324PA 7. Packaging Information 7.1 44A PIN 1 PIN 1 IDENTIFIER COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE D1 9.90 10.00 10.10 Note 2 Notes: 1. This package conforms to...
Page 20 SEATING PLANE COMMON DIMENSIONS (Unit of Measure = mm) 0º ~ 15º REF SYMBOL MIN NOM MAX NOTE A1 0.381 52.070 52.578 Note 2 15.240 15.875 E1 13.462 13.970 Note 2 0.356 0.559 B1 1.041 1.651 Notes: 1. Thi...
Page 21 ATmega164PA/324PA Marked Pin# 1 ID SEATING PLANE TOP VIEW Pin #1 Corner SIDE VIEW Option A Pin #1 COMMON DIMENSIONS Triangle (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE Option B A1 – 0.02 0.05 Pin ...
Page 22 7.4 44MC Pin 1 ID SIDE VIEW TOP VIEW B15 B1 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX N O T E A1 0.00 0.02 0.05 e T b 0.18 0.23 0.30 C 0.20 REF BOTTOM VIEW Note: 1. The terminal #1 I...
Page 23 ATmega164PA/324PA A1 BALL ID 0.10 TOP VIEW A2 SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A1 BALL CORNER 49 - Ø0.35 ± 0.05 A2 0.65 – – BOTTOM VIEW D1 3.90 BSC E 4.90 5.0...
Page 24 8. Errata 8.1 ATmega164PA Rev. E No known Errata. 8.2 ATmega324PA Rev. F No known Errata. ATmega164PA/324PA 8152BS–AVR–02/09
Page 25 ATmega164PA/324PA 9. Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the d...

Manual Details

Brand Atmel
Pages 25
File Size 643.20 KB
Published May 15, 2026
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Frequently Asked Questions

Which methods can be used to enhance code security on the microcontroller?

Security features include optional Boot Code Sections with Independent Lock Bits and True Read-While-Write operation.

What communication interfaces are supported by this chip range?

It supports Two-wire Serial, Programmable USARTs, and Master/Slave SPI Serial Interface.

How many general purpose digital I/O lines does the device offer?

The microcontroller is equipped with 32 programmable I/O Lines.

What low power states are available for operation?

There are six sleep modes, including Idle, Power-save, Power-down, Standby, and Extended Standby.