AD7478 Analog Devices Data Sheet manual specifications
Summary
Discover the AD7476/AD7477/AD7478 series—highly efficient 12-, 10-, and 8-bit Successive Approximation Registered ADCs, designed for compact SOT-23 packages. These high-throughput, low-power devices are perfect for demanding applications such as medical instruments, battery-powered systems, and data acquisition hardware. This manual provides comprehensive technical details, including functional block diagrams, operational theory, detailed specifications, and application guidance necessary for seamless integration into your design.
Page 1 Text Content
1 MSPS, 12-/10-/8-Bit ADCs in 6-Lead SOT-23
AD7476/AD7477/AD7478
FEATURES FUNCTIONAL BLOCK DIAGRAM
Fast throughput rate: 1 MSPS VDD
Specified for VDD of 2.35 V to 5.25 V Low power
12-/10-/8-BIT VIN SUCCESSIVE-
3.6 m W typical at 1 MSPS with 3 V supplies
APPROXIMATION ADC
15 m W typical at 1 MSPS with 5 V supplies Wide input bandwidth 70 d B SNR at 100 k Hz input frequency
CONTROL
Flexible power/serial clock speed management SDATA
LOGIC
No pipeline delays CS
High speed serial interface
AD7476/AD7477/AD7478
SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible Standby mode: 1 μA maximum GND 6-lead SOT-23 package Figure 1.
APPLICATIONS Battery-powered systems Personal digital assistants Medical instruments Mobile communications Instrumentation and control systems Data acquisition systems www.BDTIC.com/ADI High speed modems Optical sensors GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD7476/AD7477/AD74781 are, respectively, 12-bit, 10-bit, 1. First 12-/10-/8-Bit ADCs in SOT-23 Packages. and 8-bit, high speed, low power, successive approximation
2. High Throughput with Low Power Consumption.
ADCs. The parts operate from a single 2.35 V to 5.25 V power supply and feature throughput rates up to 1 MSPS. Each part
3. Flexible Power/Serial Clock Speed Management. The
contains a low noise, wide bandwidth track-and-hold amplifier
conversion rate is determined by the serial clock, allowing 4-
that can handle input frequencies in excess of 6 MHz.
the conversion time to be reduced through the serial clock speed increase. This allows the average power consumption
The conversion process and data acquisition are controlled
to be reduced while not converting. The parts also feature a
using CS and the serial clock, allowing the devices to interface
shutdown mode to maximize power efficiency at lower
with microprocessors or DSPs. The input signal is sampled on
throughput rates. Current consumption is 1 μA maximum
the falling edge of CS and the conversion is initiated at this
when in shutdown mode.
point. There are no pipeline delays associated with these parts.
4. Reference Derived from the Power Supply.
The AD7476/AD7477/AD7478 use advanced design techniques
to achieve very low power dissipation at high throughput rates. 5. No Pipeline Delay. The parts feature a standard successive- The reference for the parts is taken internally from VDD. This approximation ADC with accurate control of the sampling
allows the widest dynamic input range to the ADC. Thus, the instant via a CS input and once-off conversion control. analog input range for the parts are 0 V to VDD. The conversion rate is determined by the SCLK. 1 Protected by U.S. Patent No. 6,681,332.
Rev. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
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Manual Details
| Brand | Analog Devices |
|---|---|
| Pages | 24 |
| File Size | 512.38 KB |
| Published | June 16, 2026 |
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Frequently Asked Questions
What low power techniques do these ADCs use for efficiency?
They feature a shutdown mode with a maximum consumption of 1 μA, utilize flexible serial clock management, and optimize conversion time to reduce average power draw.
What types of interfaces or microprocessors are compatible with the AD747x series?
The devices support standard high-speed serialization using SPI®, QSPI™, MICROWIRE™, and are noted as being DSP-compatible.
How do I precisely control the analog input sampling process?
Data acquisition is controlled by signaling the CS, SCLK, and SDATA lines, allowing conversion initiation at the falling edge of the CS signal.
What are the maximum bandwidth capabilities for the input signal?
They feature a wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 6 MHz.