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AD5066 Analog Devices Data Handbook/Manual

Summary

The AD5066 is a high-performance, low power quad 16-bit unbuffered DAC ideal for demanding applications like data acquisition and process control. Featuring industry-leading accuracy (±1 LSB INL) and operating from 2.7 V to 5.5 V, this device offers fast settling times and robust power management features. This summary provides a comprehensive overview of the AD5066's technical specifications, high-speed operation details, functionality, and application guidelines for engineers selecting precise digital signal components.

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Fully Accurate 16-Bit Un Buffered VOUT DAC SPI

Interface 2.7 V to 5.5 V in a TSSOP

Preliminary Technical Data AD5066 FEATURES FUNCTIONAL BLOCK DIAGRAMS Low power Quad 16 bit DAC, ± 1LSB INL Individual reference pins 2.7 V to 5.5 V power supply Unbuffered voltage output capable of driving 60KΩ Fast Settling time of 4 us typically Power-on reset to zero scale or mid-scale Per channel power-down 3 power-down functions Low glitch on power up Hardware LDAC with LDAC override function CLR Function to programmable code Small 16 lead TSSOP Figure 1.AD5066

APPLICATIONS Process control Data acquisition systems Portable battery-powered instruments

Table 1. Related Devices

Digital gain and offset adjustment

Part No. Description

Programmable voltage and current sources

AD5666 Quad,16-bit buffered D/A,16 LSB INL, TSSOP

Programmable attenuators

AD5065/45/25 Quad,16-bit buffered D/A,1 LSB INL, TSSOP

www.BDTIC.com/A AD5064/44/24 Quad 16-bit nano DAC, 1 LSB INL, TSSOP

AD5063/62 16-bit nano DAC, 1 LSB INL, MSOP AD5061 16-/14bit nano DAC, 4 LSB INL, SOT-23 AD5060/40 16-/14bit nano DAC, 1 LSB INL, SOT-23

GENERAL DESCRIPTION The AD5066 is a low power, 16-bit quad-channel, unbuffered The outputs of all DACs can be updated simultaneously using

voltage-out DAC offering relative accuracy specs of 1LSB INL the LDAC function, with the added functionality of user-select-

with individual reference pin and can operate from a single able DAC channels to simultaneously update. There is also an 2.7V to 5.5V. The AD5066 parts also offer a differential asynchronous CLR that clears all DACs to a software-selectable accuracy specification of ±1 LSB. Reference buffers are also

code - 0 V, midscale, or full scale.

provided on-chip. The parts use a versatile 3-wire, low power

Schmitt trigger serial interface that operates at clock rates up to PRODUCT HIGHLIGHTS

50 MHz and is compatible with standard SPI®, QSPI™, 1. Quad channel available in 16-lead TSSOP package. MICROWIRE™, and DSP interface standards. The AD5066

2. Individual voltage reference pins

incorporates a power-on reset circuit that ensures the DAC

3. 16 bit accurate, 1 LSB INL.

output powers up zero scale or midscale and remains there until

a valid write takes place to the device. The AD5066 contain a 4. Low glitch on power-up.

power-down feature that reduces the current consumption of

5. High speed serial interface with clock speeds up to 50 MHz.

the device to typically 330 n A at 5 V and provides software

6. Three power-down modes available to the user.

selectable output loads while in power-down mode. The part

can be placed into power-down mode over the serial interface. 7. Reset to known output voltage (zero scale).

Total unadjusted error for the part is <0.8 m V. Both parts exhibit very low glitch on power-up.

Rev. Pr B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 © 2007 Analog Devices, Inc. All rights reserved.

Page Summary Contents For AD5066 Analog Devices Data Handbook/Manual

Page 1 Fully Accurate 16-Bit Un Buffered VOUT DAC SPI Interface 2.7 V to 5.5 V in a TSSOP Preliminary Technical Data AD5066 FEATURES FUNCTIONAL BLOCK DIAGRAMS Low power Quad 16 bit DAC, ± 1LSB INL Individual...
Page 2 AD5066 Preliminary Technical Data TABLE OF CONTENTS REVISION HISTORY www.BDTIC.com/ADI Rev. Pr B | Page 2 of 20
Page 3 Preliminary Technical Data AD5066 SPECIFICATIONS VDD = 2.7 V to 5.5 V, RL = 2 kΩ to GND, CL = 200 p F to GND, 2.2V ≤VREFIN ≤. VDD unless otherwise specified. All specifications TMIN to TMAX, unless ot...
Page 4 AD5066 Preliminary Technical Data A Grade1 B Grade1 Parameter Min Typ Max Min Typ Max Unit Conditions/Comments Pin Capacitance 4 4 p F POWER REQUIREMENTS VDD 2.7 5.5 2.7 5.5 V All digital inputs at 0 ...
Page 5 Preliminary Technical Data AD5066 AC CHARACTERISTICS VDD = 2.7 V to 5.5 V, RL = 2 kΩ to GND, CL = 200 p F to GND, VREFIN = 4.096 unless otherwise specified. All specifications TMIN to TMAX, unless oth...
Page 6 AD5066 Preliminary Technical Data TIMING CHARACTERISTICS All input signals are specified with tr = tf = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. See Figure 3 and Fig...
Page 7 Preliminary Technical Data AD5066 DIN DB23 DB0 LDAC1 LDAC2 t15VOUT 1ASYNCHRONOUS LDAC UPDATE MODE. 2SYNCHRONOUS LDAC UPDATE MODE. Figure 3. Serial Write Operation www.BDTIC.com/ADI Rev. Pr B | Page 7 ...
Page 8 AD5066 Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 5. Stresses above those listed under Absolute Maximum Ratings Parameter Rating may cause permanent d...
Page 9 Preliminary Technical Data AD5066 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 4. 16-Lead TSSOP (RU-16) Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1 LDAC Pulsing this pin lo...
Page 10 AD5066 Preliminary Technical Data TERMINOLOGY Relative Accuracy Full-Scale Error For the DAC, relative accuracy, or integral nonlinearity (INL), is Full-scale error is a measure of the output error wh...
Page 11 Preliminary Technical Data AD5066 Digital Crosstalk Multiplying Bandwidth Digital crosstalk is the glitch impulse transferred to the output The amplifiers within the DAC have a finite bandwidth. The o...
Page 12 AD5066 Preliminary Technical Data THEORY OF OPERATION D/A SECTION The AD5066 are Quad 16-bit, serial input, voltage output DACs. The parts operate from supply voltages of 2.7 V to 5.5 V. Data is writt...
Page 13 Preliminary Technical Data AD5066 Table 7. Command Definitions Command C3 C2 C1 C0 Description 0 0 0 0 Write to Input Register n 0 0 0 1 Update DAC Register n 0 0 1 0 Write to Input Register n, update...
Page 14 AD5066 Preliminary Technical Data INPUT SHIFT REGISTER SYNC INTERRUPT The AD5066 input shift register is 32 bits wide (see Figure 8). In a normal write sequence, the SYNC line is kept low for at The f...
Page 15 Preliminary Technical Data AD5066 Table 9. DCEN (Daisy-Chain Enable) Register (DB1) (DB0) Action 0 0 Standalone mode (default) 1 0 DCEN mode Table 10. 32-Bit Input Shift Register Contents for Daisy-Ch...
Page 16 AD5066 Preliminary Technical Data updates synchronously; that is, the DAC register is updated CLEAR CODE REGISTER after new data is read, regardless of the state of the LDAC pin. The AD5066 has a hard...
Page 17 Preliminary Technical Data AD5066 Table 13. Clear Code Register Clear Code Register DB1 DB0 CR1 CR0 Clears to Code 0 0 0x0000 0 1 0x8000 1 0 0x FFFF 1 1 No operation Table 14. 32-Bit Input Shift Regis...
Page 18 AD5066 Preliminary Technical Data AD5066 to 80C51/80L51 Interface MICROPROCESSOR INTERFACING Figure 12 shows a serial interface between the AD5066 and the AD5066 to Blackfin® ADSP-BF53X Interface 80C5...
Page 19 Preliminary Technical Data AD5066 APPLICATIONS +5 V output. USING A REFERENCE AS A POWER SUPPLY FOR THE AD5066 Because the supply current required by the AD5066 is extremely +5V low, an alternative op...
Page 20 AD5066 Preliminary Technical Data OUTLINE DIMENSIONS PIN 1 1.20 MAX 0.19 SEATING PLANE COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 17. 16-Lead Thin Shrink Small Outline Package [TSS...

Manual Details

Brand Analog Devices
Pages 20
File Size 441.51 KB
Published May 14, 2026
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Frequently Asked Questions

What is the maximum clock speed for the AD5066 interface?

The high-speed serial interface operates at clock rates up to 50 MHz, supporting standards like SPI®, QSPI™, and MICROWIRE cloud.

How does the device behave when powered on or reset?

It powers up either to the zero scale or midscale and has a power-on reset circuit that ensures low glitch on startup. It can be cleared asynchronously to any code.

What is the required operating voltage range for AD5066?

The device operates using a power supply voltage (VDD) ranging from 2.7 V to 5.5 V.

Are there methods to reduce power consumption?

Yes, the AD5066 offers three distinct power-down modes available to the user for reducing current draw.

What is the guaranteed resolution and accuracy of the DAC?

The device features 16-bit resolution with a relative accuracy specification of ±1 LSB INL.