PHILIPS 74F657 Data Sheet
Summary
Philips 74F657 is an octal transceiver with integrated 8-bit parity generator/checker combining the functions of 74F245 transceiver and 74F280A parity chip in a single 24-pin package. It features high-impedance inputs drawing only 70uA for reduced bus loading, 3-state outputs sinking 64mA and sourcing 15mA, and selectable odd/even parity generation. In transmit mode, port A data is polled and parity output reflects the selected parity scheme; in receive mode, port B data is checked against the parity input. Available in 24-pin plastic DIP package with industrial temperature range, it targets bus-oriented computing and communication systems.
Page 1 Text Content
INTEGRATED CIRCUITS查询I74F657D供应商
74F657 Octal transceiver with 8-bit parit generator/checker
Process specification 1990 Jul 30
IC15 Data Handbook
Page Summary Contents For PHILIPS 74F657 Data Sheet
Manual Details
| Brand | Philips |
|---|---|
| Pages | 12 |
| File Size | 113.18 KB |
| Published | July 04, 2026 |
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Frequently Asked Questions
What package does the I74F657D come in?
It is a 24-pin plastic SOL package with SOT137-1 drawing number.
What is the typical propagation delay of the 74F657?
The typical propagation delay is 8.0ns.
What temperature range does the industrial I74F657D support?
It operates from -40°C to +85°C.
How does the parity select input work during transmit mode?
When T/R is high, set ODD/EVEN, then A port data is polled to set the PARITY output per parity setting and high bit count.